WSEAS Transactions on Systems
Print ISSN: 1109-2777, E-ISSN: 2224-2678
Volume 25, 2026
Design of a 2 MSample/s Second Order TFT-based Passive Sigma-Delta Modulator
Authors: ,
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Abstract: Sigma-delta ADCs achieve high resolution using low-precision circuitry and are typically based on switched-capacitor integrators employing high-bandwidth operational transconductance amplifiers (OTAs), which are difficult to realize in TFT technologies because of the intrinsically low carrier mobility of TFT devices compared to CMOS. Passive sigma-delta architectures provide an attractive alternative, requiring only switches, an intermediate amplifier, a comparator, and clock-generation circuitry. This paper presents a TFT-based passive sigma-delta modulator operating at a 2 MSample/s clock frequency with a 5 V supply using Pragmatic flexible-substrate IC technology. High-speed operation is achieved through system-level adaptation together with optimized gated-amplifier and comparator circuits. Circuit simulations demonstrate an SNDR of 87 dB over a 1.953 kHz signal bandwidth. The proposed design operates at a substantially higher clock frequency than previously reported TFT-based sigma-delta modulators, which are generally limited to the kHz-to-sub-MHz range.
Keywords:
flexible electronics, passive sigma-delta, TFT, data conversion, nFET-only, IGZO, thin film
Pages: 526-536
DOI: 10.37394/23202.2026.25.42