WSEAS Transactions on Circuits and Systems
Print ISSN: 1109-2734, E-ISSN: 2224-266X
Volume 22, 2023
Impact of Discrete-Time Modeling on Dual Input Buck-SEPIC Converter
Authors: , ,
Abstract: This paper addresses aspects of a two-input Buck-SEPIC dc-dc converter. This integrated DC-DC converter processes power from two sources, two switches, and four different energy storage elements. The designed converter is processing 48 volts from two sources $$V_{g1}$$ = 36 V and $$V_{g2}$$ = 60 V. The transfer function modeling of this converter plays an important role in addressing several crucial aspects like optimal parameter design, controller design, stability, and robustness issues. Here, two types of transfer function modeling aspects are considered: continuous-time and discrete-time. The discrete-time transfer function is derived by considering trailing-edge as well as leading-edge digital pulse-width modulation scheme (DPWM) and for each of these cases time-delays in the control loop are also included. The designed converter parameters L1, L2, C1, and C2 are based on the design equations. The transfer functions are obtained in continuous-time and discrete-time for the TI-BS converter in the MATLAB environment. The experimental validation of the TI-BS dc-dc converter is performed through Hardware in Loop (HIL) using the real-time environment of the OPAL RT. For TIBS converter polezero configurations and frequency response characteristics are plotted. Using these plots important characteristics related to the deviation in phase angle of frequency response at higher frequencies due to RHP zeros are observed. The simulation studies are performed considering a 36 V / 60 V to 48 V, 500 W, prototype, DC power distribution system. The detailed modeling aspects in continuous-time as well as in discrete time are discussed considering a two-input Buck-SEPIC converter. The mathematical derivations of four different transfer function matrices using discrete-time modeling (trailing-edge and leading-edge modulation) are discussed in detail along with timing diagrams considering interval-1 and interval-2 sampling. The frequency response of the TI-BS dc-dc converter is affected when it is modeled using the discrete-time models and such frequency response deviation in phase response is observed for the TI-BS converter. The non-minimum phase response of this converter is shown using the Bode frequency response in the MATLAB environment and verified using the pole-zero map.
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Keywords: DC-DC Converter, Two Input Buck SEPIC, Digital Pulse Width Modulation, Leading Edge DPWM, Trailing Edge DPWM, Bode Plots, Pole-Zero Maps
Pages: 274-288
DOI: 10.37394/23201.2023.22.28