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Published Articles with Keyword: XOR-MUX- Full adder
- Title: FPGA Implementation of High-Performance Truncated Rounding based Approximate Multiplier with High-Level Synchronous XOR-MUX Full Adder
Authors: G. Erna, G. Srihari, M. Purna Kishore, Ashok Nayak B., M. Bharathi
Doi: 10.37394/23201.2023.22.13
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Published in WSEAS Transactions on Circuits and Systems, Volume 22, 2023