WSEAS Transactions on Circuits and Systems
Print ISSN: 1109-2734, E-ISSN: 2224-266X
Volume 12, 2013
An Off-Chip ESD Protection Strategy for High-Speed USB Interfaces
Authors: ,
Abstract: The electrostatic discharge (ESD) is one of the most important reliability problems in an electronic product. For Universal Serial Bus (USB) is a hot insertion and removal interface, its components are easily subject to ESD damage. This work focuses on the influence of the using of USB in plugging and/or unplugging impact arisen from ESD. Employing the off-chip protection technique and commercial protection products, the paper proposes an ESD Protection Strategy for USB (EPSU) to effectively enhance ESD robustness. The comparisons among these ESD protection designs are also discussed. Numerous experiments have been made, the EPSU is around 39.6% more efficient for improving the power trace test, 38.7% for the signal trace D+ test, 41.2% for the signal trace D- test, 39.0% for the GND test, and 39.9% for the shield test. All the ESD tests are complied with the test standard of IEC61000-4-2. To conclude, not but the least of USB, the protection strategy can also be applied to some other USB related electronic products.
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Keywords: Electrostatic discharge (ESD), High-speed USB interfaces, EPSU, Off-chip ESD protection, ESD robustness, 61000-4-2 standard