WSEAS Transactions on Computers
Print ISSN: 1109-2750, E-ISSN: 2224-2872
Volume 13, 2014
Implementation of Efficient Bit Permutation Box for Embedded Security
Authors: , ,
Abstract: Security in every real time applications is of utmost importance. The secure architecture implemented in the automobiles such as EVITA (E-safety Vehicle Intrusion protected Application), SEVECOM (Secure Vehicle Communication) has rich cryptographic properties, but has more footprint area and high power consumption. This existing architecture uses standard engines like AES (Advanced encryption standard), Elliptical curves, Hash Engines which are heavy in memory requirement and consumes more power. So its reach is limited only to high end systems that consisting of large bit processors and coprocessors. Role of a bit permutation instruction in cryptographic environment is well proven. GRP (Group Operations) and OMFLIP (Omega-Flip) networks are bit permutation instructions and its implementation in hardware not only accelerates software cryptography but also results in less footprint area and low power consumption. This paper proposes a novel implementation and analysis of GRP and OMFLIP architecture for security in small scale embedded networks. In this paper a hybrid implementation is analysed and its results are compared with ‘P’ box of standard algorithms like AES and DES (Data Encryption Standard). This paper shows that GRP needs very less memory space as compared to other bit permutation instructions and will be useful to design lightweight ciphers.
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Pages: 442-451
WSEAS Transactions on Computers, ISSN / E-ISSN: 1109-2750 / 2224-2872, Volume 13, 2014, Art. #39