WSEAS Transactions on Circuits and Systems
Print ISSN: 1109-2734, E-ISSN: 2224-266X
Volume 13, 2014
A 1.8V 22mW 10 bit 165 MSPS Pipelined ADC for Video Applications
Authors: ,
Abstract: In analog to digital converter, power consumption is considered as a major challenge to improve the performance. In this paper double sampling MDAC and amplifier sharing techniques are used to reduce power consumption for video applications.Since the requirements of high frame rate video capturing instruments and other video systems are successfully matched with that of the presented pipelined data converter, it is suitable for such applications. Use of dynamic comparators in the 1.5 bit stage architecture causes further reduction in power consumption.A 10 bit 165 MSPS Pipelined ADC which consumes 22mW of power was designed. The ADC was designed in a 0.18μm CMOS process and achieves 64 dB SFDR,56.1 dB SNDR, 9.02 ENOB and 0.25PJ/step FOM for a 1-V differential input signal and 9 MHz Input frequency from a 1 .8V supply voltage. From the results it was observed that this 10 bit Pipelined ADC was suitable for Video applications.
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Keywords: Pipelined ADC, Low power, Video application, Dynamic Comparator, Amplifier sharing, Sample-and-Hold
Pages: 343-352
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 13, 2014, Art. #38