WSEAS Transactions on Computers
Print ISSN: 1109-2750, E-ISSN: 2224-2880
Volume 14, 2015
Tag Management in a Reconfigurable Tagged-Token Dataflow Architecture
Authors: ,
Abstract: Combining dataflow concepts with reconfigurable computing provides a great potential to exploit the application parallelism efficiently. However, to express such parallelism cannot be a trivial task. Therefore, there is a great effort to automatically translate programs originally written in procedural languages (like C and Java) into dataflow architectures which express the parallelism in a natural way. Our previous work presents a static dataflow architecture which is part of a framework to translate C programs into reconfigurable dataflow architectures. In this paper, it is discussed an implementation of tag management in a reconfigurable tagged-token dataflow architecture which was implemented on a field programmable gate array (FPGA). Although tagged-token is a traditional concept to implement dynamic dataflow machines, they have not been well explored in FPGA-based dataflow architectures. The FPGA-based dynamic dataflow architecture shows the potential for high computation rates allowing more efficient execution and presenting a more effective way to exploit parallelism for several program statements, as nested loops and function calls, when compared to static dataflow architectures.
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Pages: 730-739
WSEAS Transactions on Computers, ISSN / E-ISSN: 1109-2750 / 2224-2880, Volume 14, 2015, Art. #71