WSEAS Transactions on Acoustics and Music
Print ISSN: 1109-9577
Volume 8, 2021
Implementation of an LDPC Decoder for IEEE 802.11n using VivadoTM High-Level Synthesis
Authors: , ,
Abstract: The increasing complexity of hardware designs calls for design methodolgies that use more abstractdesign entries and increased automation of the implementation process. Highlevel synthesis (HLS) has been aresearch topic for the past 20 years, and current tools, such as Xilinx VivadoTM HLS promise to bring HLS towidespread use. In this paper we use Xilinx VivadoTMHLS to design an LDPC decoder for 802.11n. Forwarderror correction decoders are typically implemented in hardware due to the high processing requirements andtherefore an LDPC decoder is an appropriate example to demonstrate the power of high-level synthesis.