An Op-Amp-Based PID Control of DC-DC Buck Converter for
Automotive Applications
ANAS BOUTAGHLALINE, KARIM EL KHADIRI, AHMED TAHIRI
Laboratory of Computer Science and Interdisciplinary Physics (L.I.P.I), Normal Superior School,
Sidi Mohamed Ben Abdellah University,
B.P 5206 Bensouda, Fez,
MOROCCO
Abstract: - The present paper introduces the design and simulation of an op-amp-based PID-controlled DC-DC
buck converter to regulate a DC voltage of 12 V to 5 V and support load currents ranging from 1 A to 5 A for
automotive applications using LTspice software. The converter operates at a switching frequency of 550 kHz,
delivering a regulated output voltage of 5 V for load currents ranging from 1 A to 5 A, with a maximum output
voltage ripple of 47.56 mV. The proposed buck converter settles to its regulated value within 943.4 µs at a load
current of 1 A, with a peak efficiency of 92.83%. The simulation results of the proposed buck converter
response to load current fluctuations show that the buck converter settles to its regulated value in 83.36 µs
during a load current change from 1 A to 5 A with an undershoot of 92.62 mV. Conversely, during a load
change from 5 A to 1 A, the proposed buck converter recovers from an overshoot of 52.04 mV within 46.32 µs.
Key-Words: - Power Management Systems; Switching Converters; DC-DC Buck Converter; PID Controller;
Transient Performance; Automotive.
Received: March 28, 2023. Revised: December 11, 2023. Accepted: December 26, 2023. Published: December 31, 2023.
1 Introduction
Energy efficiency is becoming more and more
important, in today’s automobile applications
making efficient power management systems crucial
to meet this demand, [1], [2]. One essential
component of these power management systems is
the DC-DC converter. The DC-DC converters are
commonly used in electronic devices like portable
electronics, wearable gadgets, Internet of Things
(IoT) devices, as well as automotive applications
like advanced driver assistance systems (ADAS)
hybrid vehicles, and electric vehicles, [3], [4], [5],
[6], [7], [8], [9], [10]. There are two types of DC-
DC converters: switching and linear. Linear
converters are simple to implement but they have
low efficiency, especially when Vi is much bigger
than Vo, with high heat dissipation, which makes
them unsuitable for high-power applications. On the
other hand, switching converters offer more
efficiency and can handle higher power levels, [11],
[12], [13]. A buck converter is a switching
converter, and found wide use in automotive
applications to reduce DC voltage from a higher
level while minimizing power loss, [14], [15], [16],
[17]. A feedback control system ensures efficient
regulation of the output voltage, using analog or
digital implementations, [18], [19], [20], [21].
Control systems with stronger computational
capabilities are gaining increasing interest recently.
Among these control systems, predictive control
techniques have shown good results when applied to
power electronics systems. However, one major
limitation they face apart, from the complexity is the
need to know the mathematical model of the
controlled system. Therefore, the use of the
predictive control techniques is not suitable for the
fast-switching converters, [22], [23], [24], [25],
[26], [27]. Also, in recent years have become
familiar with the use of artificial intelligence
techniques employed in DC-DC converter control,
particularly deep learning as well as artificial neural
networks, which according to research, possess
good potential for effective power converters output
voltage regulation, [28], [29], [30], [31]. One of the
most popular control strategies for DC-DC
converters over the last few years is the
proportional-integral-derivative (PID) control
strategy. PID control systems reduce steady-state
error as well as settling time and overshoot, [32],
[33]. PID control uses three components:
proportional, integral, and derivative. The
proportional component provides a proportionate
response to the deviation between the actual and
desired output voltage. The integral part gives a
proportional response to the error accumulated over
time, while the derivative component provides a
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DOI: 10.37394/23203.2023.18.61
Anas Boutaghlaline, Karim El Khadiri, Ahmed Tahiri
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proportional response to the rate of change of the
error.
The present study aims to design and simulate a
DC-DC buck converter with a voltage-mode PID
controller for automotive applications, using
LTspice, which is an open-source software variant
of the Simulation Program with Integrated Circuit
Emphasis (Spice). In this research, it is assumed that
the proposed converter will provide higher
efficiency, stability, and output accuracy than the
conventional converters, due to the accurate and fast
control over the output voltage of the converter,
using an op-amp based PID controller, resulting in a
more reliable and efficient power management
system.
The remainder of the present paper is structured
as follows: Section 2 explains the control strategy
and design of the proposed converter. Section 3
presents, compares, and discusses the simulation
results. Section 4 serves as the conclusion section of
the paper.
2 Methods
The proposed architecture of the buck converter,
including the voltage-mode PID controller, is
presented in Figure 1. The buck converter is the
power stage and consists of four main components:
the inductor L, the output capacitor Co, the diode D,
and the power switch Q. The proposed converter
operates in two stages: the on-time phase and the
off-time phase.
Fig. 1: The proposed DC-DC buck converter with
PID control
The buck converter output voltage Vo is
expressed as equation (1), where d represents the
duty cycle of the switch Q, and Vi is the input
voltage. The inductor value L and the output
capacitor value Co can be calculated using equations
(2) and (3), respectively, where ΔIind is the inductor
ripple current, f is the switching frequency, and ΔVo
is the output voltage ripple. The op-amp-based
controller provides higher accuracy and flexibility in
tuning the controller parameters for optimal
performance. The feedback signal from the output
voltage is fed to the op-amp-based PID controller
through a voltage divider based on Rfb1 and Rfb2
resistors, as expressed in equation (4). Therefore,
the generated feedback voltage is compared with a
reference voltage Vref through a subtractor circuit to
calculate the error for a reverse-acting controller. As
the feedback voltage increases, the error signal
decreases. The controller uses a parallel
combination of the proportional, integral, and
derivative terms to adjust the duty cycle according
to the error voltage. The PWM signal with the
appropriate duty cycle is then generated by
summing the individual terms and comparing the
sum result to a ramp voltage signal Vramp.
(1)
(2)
(3)
(4)
The proposed DC-DC buck converter controlled
by voltage-mode PID design has the following
specifications: an input voltage of 12 V, an output
voltage of 5 V, a load current range of 1 A to 5 A,
and a switching frequency of 550 kHz. Table 1
summarizes the calculated values of the buck
converter components besides its specifications.
Table 1. Buck converter specifications and
component values
Parameter/Component
Values
Input voltage
12 V
Output voltage
5 V
Switching frequency
550 kHz
Load current
1 A – 5 A
Maximum output voltage ripple
50 mV
Inductor L
30 µH
Output capacitor Co
7 µF
2.1 DC-DC Buck Converter Modelling
2.1.1 ON-time Phase
During the on-time phase, switch Q is closed,
allowing current to flow through the inductor L.
This magnetic field around the inductor increases as
a result, and the inductor stores energy, while the
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diode is reverse-biased, and the output capacitor Co
supplies the load current. Figure 2 illustrates the
operation in the switch-on state. Equations (5), (6),
(7), and (8) are derived using Kirchhoff's laws. The
buck converter output voltage is expressed in (9)
and is equal to the output capacitor voltage.
Fig. 2: Buck converter ON-time phase operation
(5)
(6)
(7)
(8)
(9)
2.1.2 OFF-time Phase
During the off-time phase, the switch Q is open, and
the diode is forward-biased. The inductor L
discharges the stored energy to the load, and the
voltage across the inductor decreases. Figure 3
illustrates the operation in the switch-off state.
Equations (10), (11), (12), and (13) are derived
using Kirchhoff's laws. The output voltage of the
buck converter is expressed in (14) and is equal to
the output capacitor voltage.
Fig. 3: Buck converter OFF-time phase operation
(10)
(11)
(12)
(13)
(14)
2.1.3 State space Model
A dynamic system is represented linearly in the state
space model. It uses a matrix equation to describe a
time-invariant linear system. A linear or nonlinear
system's performance is frequently modeled using
state space models, [34], [35], [36]. The buck
converter is a nonlinear system because it is a
switching converter. The state space averaging
method effectively analyzes nonlinear systems, [37].
The state space model of the ON-time phase is
determined based on the equations (6), (8), and (9)
and can be expressed as (15) and (16). Furthermore,
the state space model of the OFF-time phase is
derived using equations (11), (13), and (14) and can
be expressed in matrix form as (17) and (18).
(15)
(16)
(17)
(18)
Assuming that the state variables are ,
, , . The output
variable is , and the input variable is
. From (15), (16), (17), and (18), the state
space model of the buck converter during the ON
and OFF time phases can be expressed as (19), (20),
(21), and (22).
(19)
(20)
(21)
(22)
Where matrices 𝑋, , 𝐴1, 𝐴2, 𝐵1, 𝐵2, C1, C2, D1,
D2, 𝑈 are given by equations (23), (24), (25), (26)
and (27):
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(23)
(24)
(25)
(26)
(27)
Then, using the state space averaging method
with equations (28), (29), (30), and (31), the
matrices 𝐴, 𝐵, 𝐶, and are calculated. The duty
cycle of the ON and OFF time phases is indicated
by the terms “d” and “(1-d)”, respectively, [37],
[38], [39].
(28)
(29)
(30)
(31)
Therefore, matrices 𝐴, 𝐵, 𝐶, and are expressed
in (32), (33), (34), and (35). The buck converter
system's complete state space model is represented
by equations (36) and (37).
(32)
(33)
(34)
(35)
(36)
(37)
Based on the buck converter state space model
given in (36) and (37) and its component values
from Table 1, a systematic procedure to examine the
buck converter stability. Initially, the characteristic
equation was formulated using (38). Subsequently,
the system matrix A was substituted with the
relevant coefficients, leading to the expression (39).
The characteristic equation was then derived by
simplifying the determinant, resulting in (40).
Numerical substitution of the given values further
transformed the equation into (41). Subsequent
calculation of the discriminant Δ confirmed its
positivity, Δ = 1360544215.6462 > 0, paving the
way for applying the quadratic formula. The roots
s1=−52985.793599 and s2=−89871.34925 were
obtained, and their negative values indicated that
both poles reside in the left half of the s-plane, as
indicated in the root locus plot shown in Figure 4.
Consequently, the conclusion was that the system is
stable under these conditions.
(38)
(39)
(40)
(41)
Fig. 4: Root locus plot
2.1.4 Transfer Function
The transfer function can be obtained according to
the state space model presented in (36) and (37).
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Equations (42) and (43) yield the Laplace transform
of (36).
(42)
(43)
Equation (44) expresses the output voltage by
substituting (43) with (37). Therefore, (45) can be
used to represent the buck converter transfer
function.
(44)
(45)
Following the 𝐴, 𝐵, 𝐶, and matrix values being
substituted into (45), equations (46) and (47)
describe the buck converter transfer function. It
incorporates the input voltage Vi, the load resistance
Ro, and the inductor's inductance L, where Vo(s) is
the buck converter output voltage and d(s) represent
the duty cycle ratio.
(46)
(47)
2.2 Op-Amp Based PID Controller Design
To design the op-amp-based PID controller for the
buck converter, the system's transfer function in
closed-loop is needed to define the controller
parameters for stable and fast response, as well as
minimal steady-state error. Figure 5 shows the block
diagram of the system. Through combining, as
given in equation (48), the transfer functions of the
PID controller Gc(s) with the buck converter Gp(s),
the transfer function of the system in closed-loop
Gcl(s) can be written as equations (49) and (50),
where Vref(s) denotes the reference voltage. By
making the coefficients of (51) parts equal, Kp, Ki,
and Kd can be expressed as equations (52), (53), and
(54), respectively.
Fig. 5: System block diagram
(48)
(49)
(50)
(51)
(52)
(53)
(54)
3 Discussion
The transient analysis results of the proposed buck
converter were obtained using LTspice software
with an input voltage of 12 V, and a load current
ranging from 1A to 5 A. Figure 6 illustrates the
transient response of the output voltage to a load
current of 1 A. The output voltage converges to its
steady state value of 4.99722 V within 943.4 µs,
with a ripple voltage of 5.59 mV. The overshoot in
the output voltage during the start-up phase is 5.56
V. The efficiency of the system is 92.78%. Figure 7
illustrates the transient response of the output
voltage to a load current of 2.5 A. The output
voltage stabilizes at its regulated value of 4.99973 V
within 614.17 µs, with a ripple voltage of 33.37 mV,
and an overshoot in the output voltage during the
start-up phase of 5.52 V. The efficiency of the
system is 92.83%. Figure 8 demonstrates the
transient response of the output voltage to a load
current of 5 A. The output voltage settles to its
steady state value of 4.99906 V within 521.68 µs,
with a ripple voltage of 47.56 mV, and an overshoot
at output voltage during the start-up phase of 5.45
V. The efficiency of the system is 90.86%.
In comparison to the finding of [40], where the
transient output voltage reaches a steady state at 10
ms for a load of 1 A, the output voltage of the
presented converter settles to the target value faster.
In particular, the transient output voltage
response to a change in load current from 1 A to 5 A
and back from 5 A to 1 A, depicted in Figure 9,
demonstrates the system's fast response. The system
settles to the regulated value with an undershoot
voltage of 92.62 mV and an overshoot voltage of
52.04 mV, while the recovery time is 83.36 µs and
46.32 µs, respectively.
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Fig. 6: 1 A load current transient response
Fig. 7: 2.5 A load current transient response
Fig. 8: 5 A load current transient response
Fig. 9: Load change transient response
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A comparison with prior studies, based on the
figure of merit (FOM) formula provided in (55) is
summarized in Table 2, and reveals that the
proposed buck converter with PID control in voltage
mode can produce the targeted output voltage across
the range of load currents while responding quickly
to variations in the load current.
(55)
Table 2. The performance comparison of the
presented buck converter with previous works
References
[42]
This work
Input voltage
12 V
12V
Output voltage
5V
5V
Load current
1A-2A
1A–5A
Step load
change
1A
4A
Undershoot/
Overshoot
recovery time
NA/
200µs
83.36µs/
46.32µs
Undershoot/
Overshoot
NA/
380mV
92.62mV/
52.04mV
Peak
efficiency
99.61%
92.83%
FOM
0.013
0.48
4 Conclusion
This paper successfully presents a voltage mode
operational amplifier-based PID controller for a
buck converter. The designed buck converter
demonstrated exemplary performance in response to
changes in load current from 1 A to 5 A. Its output
voltage settles to the targeted value within 943.4 µs.
The proposed converter recovers during load change
with an undershoot voltage of 92.62 mV, an
overshoot voltage of 52.04 mV, and a recovery time
of 83.36 µs and 46.32 µs, respectively. The peak
efficiency is 92.83%, and the maximum output
voltage ripple is 47.56 mV. These results
demonstrate the effectiveness of the PID control
method in regulating the output voltage. To enhance
the transient performances and power efficiency of
the buck converter, it may be possible to conduct
further research on digital control strategies through
artificial intelligence methods, especially neural
networks, and deep learning control methodologies,
in the future. Another recommendation for future
work is designing the converter at the layout level in
the 180nm CMOS process to determine the total
chip area.
Acknowledgement:
This work was funded by the PPR2 program of the
National Center for Scientific and Technical
Research (CNRST Morocco).
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WSEAS TRANSACTIONS on SYSTEMS and CONTROL
DOI: 10.37394/23203.2023.18.61
Anas Boutaghlaline, Karim El Khadiri, Ahmed Tahiri
E-ISSN: 2224-2856
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WSEAS TRANSACTIONS on SYSTEMS and CONTROL
DOI: 10.37394/23203.2023.18.61
Anas Boutaghlaline, Karim El Khadiri, Ahmed Tahiri
E-ISSN: 2224-2856
601
Volume 18, 2023