An Improved Conventional Diode-Clamped Multilevel Inverter Using
Non-Zero Triangular- Based Unipolar Modulation Scheme
CANDIDUS U. EYA1,2,a, UGWUANYI OLIVER O.3,b, OMEJE CRESCENT O.4,c
1Department of Electrical Engineering, University of Nigeria Nsukka, NIGERIA
2African Centre of Excellence, University of Nigeria, NIGERIA
3Department of Electrical Engineering, University of Nigeria Nsukka, NIGERIA
4Department of Electrical/Electronics Engineering, University of Port Harcourt, Rivers State, NIGERIA
Abstract: - This paper presents an improved conventional diode-clamped multilevel inverter using non-zero
triangular-based unipolar modulation scheme. The proposed scheme is meant to reduce the number of carrier
waves, minimize the circuits of modulation scheme and obtain stabilized output voltage waveforms. Non-zero
triangular-based unipolar modulation scheme is actualized by using two zero-free triangular wave carriers and
two modulating sinewaves for line-to- line five level output voltage waveforms in single phase full bridge
diode-clamped multilevel inverter unlike conventional multicarrier sinusoidal pulse width modulation that uses
four triangular waves and one modulating sinewave for the same inverter type. The proposed system also used
microcontroller in the combinational of its wave signals in order to generate the appropriate triggering signals
for switching the power semiconductor switches. The proposed system has the following features: (i) It
produces two distinct triggering trains (W1 and W2) meant to reduce the low and high harmonics unlike
conventional modulation techniques (ii) All its carrier waves operate in continuous current mode which makes
it unique from other multicarrier and other related modulation schemes (iii) it has low component counts. The
proposed scheme on the conventional diode-clamped inverter produced the following results: voltage and
current with total harmonic distortions of 0.4547%, stabilized 400V output voltage and 20A output current,
probability results at each level of voltage and current occurrences are 0.10, 0.25, 0.25, 0.75 and 0.90; power
output of 80kW, low component counts of modulation circuit scheme and experimental prototype.
Key-Words: - Improved, modulation, non-zero triangular, unipolar
Received: March 26, 2021. Revised: January 14, 2022. Accepted: February 2, 2022. Published: February 21, 2022.
1 Introduction
Multilevel DC-to-AC converter is an inverter with
different levels of output voltages which share the
input supply voltage/s depending on the stability of
the system and the kind of circuit configurations.
Under stabilized operating conditions, the output
voltages of the multilevel inverter (MLI) share the
input voltage equally and vice versa. A lot of
researches have been ongoing on multilevel inverter
due to its attractive features of high power
eminence, great voltage handling capability, little
switching power losses and reduced EMI
Multilevel inverters have various types ranging
from the conventional topologies such as diode-
clamped multilevel inverter, flying capacitor
multilevel inverter and cascaded multilevel inverter
[1]-[11] to different improved topological circuits
like Hybrid MLI, modular multilevel inverters,
optimized cascaded multilevel inverter etc.) [12]-
[18]. The three conventional multilevel inverters
have intrinsic imbalance voltage levels which is
observable in the waveforms of the input capacitors
and the loads beyond 0.1second [already seen in 2]
without adding any extra circuitries for removing
the imbalances. The concept of additional circuits
on the conventional types is to compensate those
voltage drops so as to improve the quality of the
output waveforms as can be seen in [19]. Multilevel
inverters (MLIs) have many applications such as in
high power applications, medium power
applications, industrial machine drive, tractions,
renewable based power generation, etc [20] - [21].
A lot of modulation schemes on multilevel inverters
have been done by many researchers in the past and
published online with diverse merits and demerits.
Some of those schemes are: in-phase disposition
pulse width modulation (IPDPWM), phase
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opposition disposition PWM (PODPWM), alternate
phase disposition PWM(APDPWM), phase shift
PWM, space vector modulation scheme, modified
space vector modulation techniques, optimized
selective harmonic elimination scheme, etc [22]-
[24].
In this research work, a 5 level line-to-line output
voltage based diode-clamped multilevel inverter is
simulated and implemented using non-zero
triangular-based unipolar modulation scheme
(NZTBUMS). NZTBUMS is a modified class of
multicarrier PWM scheme. It is different from
multicarrier PWM scheme in the sense that (i) the
carrier waveforms are not touching zero axis
therefore operating in continuous current mode, (ii)
it has reduced number of carrier waveforms, (iii) it
has reduced total harmonic distortions (iv) It has
lower signal component counts (v) It produces two
distinct trains of firing signals unlike conventional
multicarrier modulation techniques.
2 Methodology
The materials that are used in this research are the
insulated gate bipolar transistors, IGBTs, clamping
diodes, resistor load and inductive load, capacitors,
connecting wires and DC source for power circuit.
These materials are used to build the power circuit
topology as shown in Fig.1. MatLab modelling and
implementation methods are adopted in this
research. Fig.1 consists of single source, Vs, two
input capacitors, four clamping diodes, eight IGBTs,
thirteen defined nodes with thirty two branches
(b11….b32) and load point. In furtherance to that, it
has two legs that are phase shifted at 180 degrees.
µ
µ
µ
SW1.2
SW1.3
SW1.4
SW1.1
µ
D1
D2
D3
D4
C1
C2
VS.
n1
LOAD
C
G
E
C
G
E
C
G
E
C
G
E
C
G
E
C
G
E
C
G
E
C
G
E
SW2.1
SW2.2
SW2.3
SW2.4
n2
n3
n4
n5
n6
n7
n8
n9
n10
n11
n13
n12
b1
b2
b3
b4
b5
b6
b1
b11
b7
b9
b1 b20
b12
b8
b10
b13
b14
b15
b17
b16
b21 b22
b23
b24
b29
b25
b32
b31
b18
b19
b26
b27
b28
b30
b30
Fig. 1: Convectional Diode Clamped Inverter [25]
So, for a complete cycle operation of Fig.1, it
experiences both positive and negative half cycles.
During the positive half cycle, vo=Vs and vo= Vs/2.
And during the negative half cycle, vo=-Vs and
vo=- Vs/2. vo=0V is produced when it is changing
from positive half cycle to negative half cycle and
vice versa. This shows that five output voltage
levels (i.e Vs , Vs/2, 0, Vs , Vs/2) are generated in
Fig.1 for every cycle of its operation across the load
point.
3 Non-Zero Triangular-Based
Unipolar Modulation Scheme
Non-zero triangular- based unipolar modulation
scheme (NZTBUMS) is modulation technique
meant for producing triggering signals for switching
the power circuit in Fig.1. The NZTBUMS is made
of two carrier signals (triangular signals), Vc.1,
Vc.2 and two reference (modulating) signals Vr.1,
Vr.2. The Vc.1 and Vc.2 are free from zero voltages
while Vr.1 and Vr.2 are phase shifted by 180oto
each other. They are represented mathematically as
in eq.s (1), (2), (3) and (4)
VpVpVpVpVp ffff 232
1
4
3
2
1
4
1
0
vc.1
(1)
VpVpVpVpVp ffff 3223
1
4
3
2
1
4
1
0
vc.2
(2)
Where f and 𝑉
𝑝 represent the switching of carrier
frequency and amplitude voltage of the carrier. The
Vr.1 and Vr.2 are expressed as in eq.s (3) and (4)
[26]
(3)
sin
2
sincos
2
cos
vr.1 Vm
(4)
𝑉
𝑚 and 𝜃 are the peak voltage of the modulating
signal and the phase angle.
The switching operations of Fig.1, NZTBUMS is
illustrated from eq.5 to eq.12. During the positive
half cycle, eq.5 to eq.8 are carried out.
0 toequalis
r.1
Vof phas e
and
c .1
V
r.1
Vif
1
1
w1.2
S
w1.1
S
(5)
Consequently, after processing eq.5, the next line of
action is eq.6
c.2
V
r. 1
Vand
c.1
V
r. 1
Vife l s e
0
1
w1 . 2
S
w1 . 1
S
(6)
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w1 . 1
S
w1 . 3
S
(7)
w1 . 2
S
w1 . 4
S
(8)
During the negative half cycle, eq.9 to eq.12 are
being processed for switching
the Fig.1, leg2.
π toequalis
r.2
Vof phas e
and
c .1
V
r.2
Vif
1
1
w2.2
S
w2.1
S
(9)
c.2
V
r. 2
Vand
c.1
V
r. 2
Vife l s e
0
1
w2 . 2
S
w2 . 1
S
(10)
w2 . 1
S
w2 . 3
S
(11)
w2 . 2
S
w2 . 4
S
(12)
The circuit diagram for implementing the Vr.1, Vr.2
Vc.2 and Vc.2 is illustrated Fig.2. It consists of
triangular generator, level shifter, sinewave
generator, microcontroller (ATmega328p) and
drivers. The carriers and modulating signals in Fig.2
are generated using one TL084 and resistor-
capacitor-zener diode combination.
Fig. 2: Non-zero triangular- based unipolar
modulation scheme topology
Fig. 2 displayed Non-zero triangular- based unipolar
modulation scheme topology. The practical
frequency of the carrier of proposed system is
determined using the concept of transfer function
[27]-[28]. The transfer function, Ts of the system is
expressed as in eq.13.
in
o
sV
V
T2
(13)
Vin, the input voltage at operational amplifier, Op
Amp, 1, Vo2, output voltage of the Op Amp.2.
But the output voltage of the operational amplifier
1, Vo1 with respect to resistances R2 and R3 and
voltage Vin, of Fig. 2, is expressed as:
2
3
1R
RV
Vin
o
(14)
And this Vo1, is equal to the input voltage of Op
Amp, 2
Besides, taking into consideration, the second
Op.Amp.2 of Fig.2, the transfer function of the
integrator becomes:
CjRV
V
o
o
41
21
1
(15)
When the expression in eq.14 is inserted into eq.15,
then the eq.16 emerges as:
2
3
2
4
2
R1
1
R
R
C
V
V
in
o
(16)
Assuming R2=R3, the face of eq. 16 becomes:
2
4
2
R1
1
C
V
V
in
o
(17)
In order to get the carrier frequency f, the magnitude
of eq.17 is set equal to
2
1
, to which is the cut-off
frequency transfer, according to the author already
seen in [28], there emerges eq.18 as.
2
1
R1
1
2
4
C
(18)
The circular and switching frequencies of Fig.2 are
deduced in eq.19 and 20
CR4
1
(rad/s) (19)
CR
f
4
2
1
(Hz) (20)
It can be noticed that R4 is the only resistor that
specifically adjusts the frequency of the carriers
Then, the output voltage of the triangular wave
circuit and the level shifter voltages are expressed
in:
k
aV
Vo
c][ 2
1.
(21)
k
bV
Vo
c][ 2
2.
(22)
Where a” and b” are the positive and negative
offset voltages while “k” is the gain factor which
ensures that analog entries into Atmega328p are
accommodated. The boundary conditions of the
offset voltages with respect to amplitude voltage of
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the carriers, Vp, are 0 < 𝑎 𝑉
𝑝 and 0 > −𝑏
−𝑉
𝑝.
4 MatLab Model, Simulation Results
and Discussion
Fig.3 displayed the MatLab/ Simulink model of the
power circuit and the proposed modulation
technique. In addition that, it showed that under
resistive load, the total distortions of both output
current and voltage is 0.4575%.
Fig. 3: MatLab Models of the MLI power circuit and it proposed scheme
The Non-zero triangular- based unipolar modulation
scheme waveforms are shown in Fig.4. It is made of
two carrier waves (Vc.1 and Vc.2) of the same
magnitudes but at different positions as well as two
modulating signals of the equal amplitudes but are
phase shifted at 180o from each other. And they have
already been mathematically represented in eq.1-4.
It is noticed that NZTBUMS has only two carrier
and two reference signals making the whole
NZTBUMS total signals to be four signals for
switching Fig.1 unlike conventional multicarrier
pulse width modulated schemes that have five
signals and above for switching a similar topology
as in Fig.2 . It is observed that Fig.4 showed the
comparison between the two zero-free carrier waves
of eqs.3 and 4 with the two modulating signals of
eqs.1 and 2.
Fig. 4: Simulated waveforms of proposed scheme non-zero triangular- based unipolar modulation scheme
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Fig. 5: Simulated Waveforms of proposed scheme
(NZTBUMS) and it switching signals for Leg.1
The firing signals for the second leg in Fig.1 are
represented in Fig.6e, 6f, 6g and 6h. It is observed
that Fig.6g is complementing Fig.6e while Fig.6h is
a complement of Fig.6f. They possess similar
characteristics like Fig.5
Fig. 6: Simulated Waveforms of proposed scheme
(NZTBUMS) switching signals for Leg.2
Fig.7 signifies balanced input capacitor voltage
under NZTBUMS. It is evident that Fig.7a and
Fig.7b have equal 200V across C1 and C2
throughout the span of 5 seconds without changing.
Fig.7c also showed where the V.C1 and V.C2 are
plotted together. And it clear that they And it clear
that they have the same voltage magnitudes at
time interval of same 5 seconds.
Fig. 7: Balanced input capacitor voltages using
NZTBUMS
The output voltage waveform across the resistive
load of Fig. 1 is shown in Fig.8. It has stabilized
five line-to-line output voltage levels with peak
voltage of 400V at 4.85 𝑡 5𝑠𝑒𝑐𝑜𝑛𝑑𝑠. It is
noticed that there is no voltage drops beyond
0.1second using NZTBUMS, which cannot be
released with other convention scheme without
using extra compensating circuitries. Even beyond
seconds, the quality of voltage waveforms remain
the shape.
Fig. 8: 5-level line-to-line output voltage waveform
of the diode-clamped multilevel inverter
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The spectral characteristics of output voltage is
shown in Fig.9. It indicated that at fundamental
frequency of 50Hz and maximum voltage of 400V,
the system output voltage has the total harmonic
distortion (THD) of 0.4575%. And the THD value
corresponded to the value already shown in Fig.3
Fig. 9: Spectral analysis of total harmonic distortion
of output voltage of the diode-clamped MLI
Fig.10 represented the output current wave shape of
the MLI under resistive load. It mimics Fig.8 except
that it has lower amplitude. The peak current value
is 20A. The power output of the MLI in this
research when the peak value of Fig.8 is multiplied
by the maximum value of Fig.10 is 8kW.
Fig.11 depicted the spectral analysis of total
harmonic distortion of output current of the MLI. It
is observed that it has THD of 0.4575% like voltage.
This showed that both voltage and current under the
resistive load are in phase.
Fig. 10: 5-level line-to-line output current waveform
of the multilevel inverter
Fig. 11: Spectral analysis of total harmonic
distortion of output current of the MLI
The statistical probabilistic analysis of both current
and voltage excursions are displayed in Fig.12. The
levels that spanned from -20A to +20A along the
horizontal axes represent the current output
statistical analysis. In Fig.12, the level 1, 2, 3, 4 and
level 5, counting from the negative half cycle to
positive half cycle, have the probabilities of 0.1,
0.25, 0.25, 0.75 and 0.9. Similarly, the levels that
covered from -400V to +400v along the horizontal
axes represent the voltage output numerical
analysis. It is also showed that level 1, 2, 3, 4 and
level 5, counting from the negative half cycle to
positive half cycle, have the same probabilities of
0.1, 0.25, 0.25, 0.75 and 0.9. This implies that the
current and voltage under restive load are in phase
Fig. 12: Statistical analysis of voltage and current waveforms of the diode clamped multilevel inverter based on
the proposed scheme
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Fig.13 illustrated 3-D plot of voltage and
current waveforms of the MLI with respect to
data points. It designated that the minimum and
maximum voltage of the MLI across the load are -
400V and 400V
Fig. 13: 3-D plot of voltage and current waveforms
of the MLI with respect to data point
5 Experimental Results and Discussion
The experimental result waveforms of the proposed
scheme and its experimental set-up are shown in
Fig.14-21. The experimented analog oscilloscopic
display of the two modulating sinewaves in Fig.14
has already been expressed in eq. 3 and eq.4 and
simulated in Fig.4. This implies that they resemble
each other
Fig. 14: Experimented waveforms of two
modulating reference voltages
Fig.15 showed implemented two zero-free carrier
waves. Those carrier waves have been
mathematically shown in eq.1 and 2, simulated in
part of Fig. 4 and practically shown in Fig.15. In
order to show the gapping between the Vc.1 and
Vc.2 as well as the practical comparison with the
reference signals, Fig.16 and 17 emerged.
Fig. 15: Experimented waveforms of carrier
voltages
In Fig.16, the positive zero-free carrier wave was
compared with the modulating sinewave to generate
the triggering pulses. The comparison between the
signals has been shown in eq.5, simulated as part of
Fig.4 and shown in experimented form in analog
oscilloscope in Fig.16. It is observed that the zero-
free positive triangular wave is above the sinewave
in order to avoid over modulation.
Fig. 16: Experimented waveforms of modulating
voltage and positive carrier wave form
A zero-free negative carrier wave was compared
with the 180o phase shifted reference signal in
Fig.17. The MatLab/Simulink simulated form of it,
has been shown in part of Fig.4 and its arithmetic
expression was deduced in eq.9
Fig. 17: Experimented waveforms of modulating
voltage and Negative carrier waveform.
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The triggering pulses were generated when the
comparative results of Fig.16 and 17 were further
processed by Atmega328p and drivers (TLP 250
and VO3120). Fig.18 showed generated triggering
pulses for switching SW1.1 and SW.13 obtained
from the output of the driver’s circuit. It is observed
that they are complementing each other. And also,
they have two distinctive regions which reduce both
low and high harmonic distortions as already seen in
simulated results of Fig.5.1 and Fig.5.2
Fig. 18 Experimented waveforms of triggering
pulse-width modulated signals
A five level line-to line output voltage across a
resistive load is shown in Fig.19. It is realized that
there is no voltage drop at each level of excursion.
This show that there is a stabilized output voltage
using NZTBUMS. It is noticed that it resembles the
wave form in Fig.7
Fig. 19: Experimented waveforms of 5-level line-to-
line Output voltage of the MLI
Fig.20 illustrated an experimented un-energized
prototype of the proposed scheme and power MLI.
Fig. 20: Experimented Un-energized Laboratory
prototype
Complete experimented and energized prototype of
the proposed scheme and diode-clamped MLI power
circuits were practically shown in in Fig.21. It can
be observed that it consists of power supply unit for
NZTBUMS, NZTBUMS section, Atemega328p,
drivers, MLI section, battery section, load light,
analog oscilloscopic display and protective unit. It
also indicated that NZTBUMS occupies small space
with low component counts as well as realizable
for switching diode-clamped multilevel inverter
used in generation five level line-to-line output
voltage.
Fig. 21: Experimented energized prototype of the
proposed scheme and power circuit
6 Conclusion
An improved conventional diode-clamped
multilevel inverter using non-zero triangular-based
unipolar modulation scheme has been analyzed,
modelled, simulated in MatLab/Simulink software
2018 and pragmatically implemented in Laboratory
of Industrial Electronics, Power Devices and New
Energy Systems. The proposed modulation system
scheme and the output waveforms of diode-clamped
MLI have been showed on two channel analog
oscilloscope. It was observed that the simulation
results and the practical waveforms resembled one
another very closely. Therefore, the experimental
prototype validates the simulated results of the
proposed system.
It was also noticed that the NZTBUMS occupied
small space and has less number of carrier signals
unlike the conventional modulation schemes, hence,
leading to low component counts and better
performance.
The results produced by the proposed scheme on
switching diode-clamped MLI are: voltage and
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current with total harmonic distortions of 0.4547%,
stabilized 400V output voltage and 20A output
current, probability results at each five levels of
voltage and current occurrences corresponded to
0.10, 0.25, 0.25, 0.75 and 0.90; and power output of
80kW. The research work also presented that the
statistical plot of voltage and current is another way
of showing that under resistive load, the voltage and
current waveforms are in phase.
Future research:
NZTBUMS will be in future research, applied in
higher diode-clamped multilevel inverters and other
hybrid multilevel inverters to determine their
performance characteristics.
Acknowledgement:
The authors acknowledge TETFUND for
sponsoring the part of this research bearing number
(TETFUND/DR&D/CE/UNI/NSUKKA/RP/VOL.I)
The authors also acknowledge the support received
from the Africa Centre of Excellence for
Sustainable Power and Energy Development (ACE-
SPED), University of Nigeria, Nsukka that enabled
the timely completion of this research
The authors acknowledge Laboratory of Industrial
Electronics, Power Devices and New Energy
Systems, University of Nigeria, Nsukka that assisted
us in using their Laboratory unit to carry out the
experimental research work.
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DOI: 10.37394/23203.2022.17. 11
Candidus U. Eya, Ugwuanyi Oliver O.,
Omeje Crescent O.
E-ISSN: 2224-2856
100
Volume 17, 2022