Grid Synchronization in a 3-Phase Inverter using Double Integration
Method
FAHEEM FAROOQ1, KAMRAN HAFEEZ1,*, BAYAN MAHDI SABBAR2,
MOHANNAD JABBAR MNATI3
1Electrical & Computer Engineering Department,
COMSATS University Islamabad,
PAKISTAN
2Al-Mustaqbal University, College of Engineering and Techniques,
Medical Instrumentation Engineering Techniques Department,
Babylon,
IRAQ
3Middle Technical University, Institute of Technology – Baghdad,
Department of Electrical Technology Al-Za’franiya,
10074 Baghdad,
IRAQ
*Corresponding Author
Abstract: - Distributed renewable energy sources (DRESs) have additional benefits compared with
conventional fossil fuel-based energy sources. These sources are connected to the utility grid using a suitable
synchronization method. It requires accurate information on grid voltage magnitude and phase angle. But the
presence of harmonics, DC Offset, and voltage unbalances makes the synchronization process more
challenging. Conventionally synchronous reference frame (SRF)- PLL is implemented for this purpose,
however, it has a problem with 100Hz ripple during distorted grid conditions. A double integration method
(DIM) is administered for the synchronization of a 3-phase inverter under non-ideal grid conditions. It is
important for DIM implementation to remove the DC offset or integrating constants of pure integrators without
involving any phase shift. This method is also compared with conventional SRF-PLL based on mathematical
modelling and simulations using a MATLAB/Simulink toolbox. The results are verified based on ideal and
non–ideal grid conditions and also tested on grid-connected 3-phase Inverter.
Key-Words: - Double Integration Method, PLL, Pulse width Modulation, grid Synchronization,
Inverter,Harmonics.
Received: April 14, 2023. Revised: February 16, 2024. Accepted: April 19, 2024. Published: May 14, 2024.
1 Introduction
Due to the expansion in consumption of electrical
power, the generation of electricity needs to be
increased. Therefore, the demand for renewable
energy sources such as solar, and wind also get
multiplied, [1]. These sources are environment-
friendly, pollution free, and distributed in nature,
[2]. These DRESs are connected to grid using
parallel inverters. To achieve parallel operation, of
inverters, its parameters; a) voltage magnitude b)
phase c) frequency must be synchronized to grid
parameters, [3]. An increase in network diversity
and connection of various types of DS makes the
synchronization process more challenging. As grid
voltage contains disturbances like DC Offset and
harmonics its waveforms are distorted and the
synchronization process is also affected, [4]. Many
synchronization techniques are discussed in the
literature. These techniques can be categorized as; a)
open-loop b) closed-loop. A feedback mechanism is
required in a closed loop system while an open loop
has no feedback involved but filtering is needed for
the extraction of required parameters, [5], [6]. A
brief description of these techniques is shown in
Figure 1, [7]. These methods include zero crossing
detector (ZCD) [8], discrete Fourier transform
(DFT) [9], adaptive notch filtering (ANF) [10],
Phase locked loop (PLL) [11] and Kalman filter
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[12]. There are several performance parameters
detected from the literature including; unbalanced
conditions, harmonics, DC offsets, phase angle
adjustment, and accuracy during the signal
synchronization process. A band pass filter is used
to remove the DC offset, but it initiates a phase shift
as frequency deviates, [13]. Second-order integrator
(SOG) PLL is proposed to remove DC components
in a single-phase system, [14]. A de-coupled double
synchronous reference frame (DDSRF-PLL) is
proposed for the grid synchronization during non-
ideal grid conditions but problems of the DC-off set
is not solved. The SRF-PLL technique is sensitive to
grid voltage unbalanced waveforms and also has a
100 Hz problem, [15]. An enhanced-PLL (E-PLL)
and dual-EPLL (DE-PLL) methods are developed
for solving grid voltage disturbances but these
techniques can be affected by harmonics, [16], [17].
The moving average filter (MAF) is used in the
structure of SRF-PL to counter-unbalance and
harmonic in the voltage signals. However, it has a
long settling time and oscillations, [18]. The multi-
complex co-efficient filter (MCCF) is implemented
to extract harmonic components and to eliminate
negative sequence components but multiple filter
modules are used that increases the computational
burden, [19]. A solar PV-based 3-phase grid
connected Inverter using double integration is
proposed in [20], that considered steady state
conditions only.
Fig. 1: Synchronization techniques
The key contribution of this paper is to propose
the DIM method in a 3-phase grid tied Inverter
under distorted grid conditions. In this paper
,current amplitude is corrected using gain values of
the controllers to adjust the amplitude of current .To
mitigate harmonics additional filters are not needed
during non-ideal grid conditions using the proposed
method, since the generated signal remains in phase
with the current.The DIM method recovers naturally
from transients, as nonlinear feedback always
remains active.It only synchronizes giving a current
or voltage reference. Therefore the proposed method
works well during non-ideal grid conditions. A PI in
the feedback will result in a high pass filter. The low
pass will make it a compensator integrating low and
high frequencies,
2 Modelling of Synchronization
Techniques
The SRF-PLL and DIM techniques are further
discussed in this section
2.1 SRF-PLL
The input to SRF-PLL is the grid’s three-phase
voltages and the output is phase angle and
frequency, Vd and Vq are the d-axis and q-axis
components as shown in Figure 2. The d-axis
corresponds to the amplitude of the voltage signal
and q-axis corresponds to phase angle information
of any one of the phases. This structure of PLL is
called Synchronous Reference Frame (SRF- PLL) or
d-q PLL. The phase angle makes a feedback loop;
the proportional integral (PI) controller is in a
forward path to secure the d-axis component
.It will also ensure grid voltage vector is perfectly
aligned with the q-axis component, [21].
Fig. 2: Basic structure of SRF- PLL
2.2 Double Integration Method (DIM)
DIM is synchronization technique without involving
the extraction of grid voltage phase angle or
frequency. It is a strategy for fixing the reference
value (voltage or current) over time as shown in
equation (1), [22].
  (1)
Where grid voltage and requirement is to remove
DC constant of integration.
Let’s consider the grid voltage in equation (2)
󰇛󰇜 (2)
Now taking double integration of equation (2) can
be expressed as 
󰇛󰇜 (3)
where C denotes the integrating constant. In a pure
sine wave signal, double integration produces a
phase shift of 180 degrees. Therefore, it can be
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applied to synchronize grid voltage or grid current.
A block diagram of single-phase digital DIM is
shown in Figure 3.
Fig. 3: Single-phase DIM
A PI compensator is designed as non-linear
feedback to remove DC offsets at each integrator.
During steady-state conditions, there will be no
interaction of the feedback and it only acts when DC
offset or distortion occurs.Since voltage has an
upper limit and frequency has a lower limit. The
integrals can be clamped for + and - afterwards, the
average can be tuned to zero.There will be a shift in
phase using a high pass filter.In steady state
conditions, there will be no interaction of the
feedback, as then the phase is exactly 180 even if
the frequency changes.
The low pass filter RC value is selected as
0.0031 for the cut-off frequency around 50 Hz. The
kp and ki values of DIM are selected as 0.1803967
and 1.821326 respectively to give a phase margin of
53 degrees to make this system stable. The low
pass filter RC+1 value is opted as 0.0031 to cut off
frequency around 50 Hz. The DIM provides no
phase shift as frequency changes but amplitude can
change. Unlike, [22], current amplitude is corrected
using gain values of controllers in a digital circuit.
In references [23] and [24], grid synchronization
and dc offset problem is solved without considering
distorted grid conditions.A comparison between
different Grid synchronization techniques and the
proposed technique is given in Table 1.
Table 1. Comparision
References
PLL
DIM
grid
synchronization
grid
distorted
conditions
20
-
-
21
-
-
23
-
-
24
-
-
proposed
-
3 Simulation Results
The SRF-PLL and DIM are simulated and compared
during normal and distorted grid conditions.
3.1 Ideal Grid Conditions
Figure 4(a-g), shows the simulation results of SRF-
PLL and DISM during ideal grid conditions. Figure
4(a) shows the 3-phase balanced input signal. Figure
4(b-f) shows the output of PLL synchronized with
the input signal, the phase angle of SRF-PLL,
frequency error signal, and FFT analysis of SRF-
PLL and DIM method. Figure 4(g) shows the output
of DIM synchronized with input signal at t= 0.005s.
(a)
(b)
(c)
(d)
(e)
(f)
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(g)
Fig. 4: SRF-PLL and DIM during Ideal Condition.
(a) Input signal. (b) Input & Output SRF- PLL. (c)
Phase angle SRF-PLL. (d) frequency and error
signal of SRF- PLL. (e) Input FFT analysis SRF-
PLL. (f) Output FFT analysis SRF-PLL. (g) Input
and Output DIM
3.2 Distorted Grid Conditions
The following distorted conditions with input
signal are simulated a) DC offset; b) harmonics; c)
voltage unbalance; d) frequency unbalances.
Figure 5(a-h), indicates the simulation results of
SRF-PLL and DISM during non ideal conditions.
The 10, 8, and 10 % DC offset values are injected in
3- 3-phasevoltages Va, Vb, and Vc respectively.
Figure 5(a) indicates the 3-phase DC offset input
signal. Figure 5(b-f) shows the output of PLL
synchronized with the input DC offset signal, phase
angle of PLL, frequency error signal, and FFT
analysis of input and output PLL. The Figure 5(g-h)
shows output of DIM synchronized with input
signal having DC offset at t= 0.005s and FFT
analysis gives its THD value of 0.02%.
(a)
(b)
(c)
(d)
(e)
(f)
(g)
(h)
Fig. 5: SRF-PLL and DIM DC offset. (a) Input of
PLL. (b) Input & Output of PLL. (c) phase Angle of
PLL. (d) frequency and error signal of PLL. (e)
Input FFT analysis of PLL. (f) Output FFT analysis
of PLL. (g) Input & Output of DIM. (h) Output FFT
analysis DIM
Time
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Conventional SRF-.PLL does not perform well
during harmonics and an additional filter is
required at the cost of time delay or slow response.
The input signal with 5th, 7th, and 11th harmonics
is added with 0.1, 0.08, and 0.05 % of Vm
respectively. Figure 6(a-h), shows the simulation
results of SRF-PLL and DISM with harmonics in
input signal. Figure 6(a) shows a 3-phase input
signal with 5th, 7th, and 11th harmonics in it.
Figure 6(b-f) shows the output of SRF-PLL
synchronize with 5th, 7th and 11th harmonics in
the input, phase angle of SRF-PLL, frequency
error signal and FFT analysis of input and output
PLL. Figure 6(g-h) shows output of DIM
synchronized with input DC offset signal at t=
0.005s and FFT analysis gives its THD value of
0.28%.
(a)
(b)
(c)
(d)
(e)
(f)
(g)
(h)
Fig. 6: SRF-PLL and DIM with Harmonics
injection. (a) Input of PLL. (b) Input and output
SRF-PLL. (c) Phase angle SRF-PLL. (d) frequency
and error signal SRF-PLL (e) Input FFT analysis
SRF-PLL. (f) Output FFT analysis SRF-PLL. (g)
Input and output DIM. (h) Output FFT analysis
DIM
The 3-phase input signal is included with
voltage unbalances with voltage magnitudes of 0.9,
0.8 and 1.2 % of Vm phase voltage. Figure 7(a-h),
shows the simulation results of SRF-PLL and DISM
with voltages unbalances in input signal as shown in
Figure 7(a) Whereas, Figure 7(b-f) shows the
output of PLL synchronize with the input phase
voltage unbalance signal, phase angle of PLL,
frequency error signal and FFT analysis of input and
output of PLL. The Figure 7(g-h) shows the output
of DIM synchronized with input signal with
Time
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voltages unbalance at t= 0.005s and FFT analysis
gives THD value of 0.02%.
(a)
(b)
(c)
(d)
(e)
(f)
(g)
(h)
Fig. 7: SRF-PLL and DIM 3-Phase Voltage
Unbalance. (a) Input of PLL. (b) Input and output
SRF-PLL. (c) Phase angle SRF- PLL. (d) frequency
and error signal PLL. (e) Input FFT analysis SRF-
PLL. (f) Output FFT analysis SRF-PLL. (g) Input
and output DIM. (h) Output FFT analysis DIM
The 3-phase input signal is added with
frequency unbalances using unequal frequencies of
0.95, 0.97 and 1.03 times of fundamental frequency.
Figure 8(a-h), exhibits the simulation results of
SRF-PLL and DIM with frequencies unbalances in
the input signal as shown in Figure 8(a) Whereas,
Figure 8(b-f) shows the output of PLL synchronized
with input signal having un balance frequencies,
phase angle of PLL, frequency error signal and FFT
analysis of input and output of PLL. Figure 8(g-h)
shows the output of DIM synchronized with the
input signal with frequencies unbalanced at t=
0.005s and FFT analysis gives a THD value of
28.47%.
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(a)
(b)
(c)
(d)
(e)
(f)
(g)
(h)
Fig. 8: SRF-PLL and DIM 3-Phase Frequency
Unbalances. (a) Input SRF-PLL. (b) Input & Output
of SRF-PLL. (c) Phase angle SRF-PLL. (d)
Frequency and error signal SRF- PLL. (e) Input FFT
analysis SRF-PLL. (f) Output FFT analysis SRF-
PLL. (g) Input and output of DIM. (h) Output FFT
analysis DIM
The results comparison between SRF-PLL and
DIM during distorted grid conditions are given in
Table 2.
Table 2. ResultsSRF-PLL and DIM
PLL
DIM
Ideal
condition
0.002 s (Response Time)
0.005 s (Response
Time)
DC offset
0.9 % of fundamental, 0.23%
THD
0.13% of fundamental,
0.02% THD
Harmonics
Addition of 3rd Harmonic,
8.97 %THD
0.28% THD
Voltage
unbalance
3rd and 5th harmonics, 3.61
%THD
0.12 % DC offset,
0.02%THD
Frequency
unbalance
76.91 THD
28.47 THD
4 Inverter Grid Synchronization
3-phase Inverter is synchronized with a grid voltage
using SRF-PLL and DIM methods under ideal and
distorted grid conditions as shown in Figure 9, [25].
The control system developed for SRF-PLL and
DIM is displayed in Figure 10 and Figure 11
respectively.
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Fig. 9: 3-Phase Grid Tied Invertor
The mathematical model of a 3-phase grid-tied
inverter in a natural reference frame is shown in (9).












(4)
After the d-q transformation, equation (4) becomes;
󰇯


󰇰󰇣 
 󰇤
󰇣
󰇤
󰇣
󰇤

(5)
By re-arranging equation (5);

  (6)

  (7)
There is coupling (current) between d axis and q
axis, to achieve zero steady-state error, the PI
regulators can be used as shown in Figure 10;
󰇛
󰇜 (8)
󰇛
󰇜 (9)
The output Voltage and can be obtained can
be obtained, where is angular frequency;
󰇛
󰇜 (10)

 (11)
Fig. 10: 3-Phase grid-connected control system
SRF-PLL
Fig. 11: 3-Phase grid-connected control system DIM
Pant Transfer function is given in equation (12)
using values, R=0.1 and L=500µH:
 (12)
And PI transfer function including kp =10, ki=500
values 
(13)
The total forward transfer function is given in
equation (14)  (14)
The step response to the plant during
uncompensated and compensated is shown in Figure
12 and its frequency plots are shown in Figure 13.It
shows the system is stable.
Fig. 12: Comparison of Step responses
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Fig. 13: Comparison of Compensated and
Uncompensated Bode Plots
The SRF-PLL and DIM synchronized with a 3-
phase Inverter is tested and simulated during ideal
and following distorted grid conditions; a) DC
offset; b) harmonics; Figure 14(a-h), shows the
simulation results of SRF-PLL and DIM with grid-
connected 3-phase inverter during ideal conditions.
Figure 14(a-b) shows 3-phase input voltage and
output current.
(a)
(b)
Fig. 14: Grid-connected Inverter SRF-PLL and
DIM, Ideal Grid conditions. (a) Input and output
SRF- PLL. (b)Input and output DIM
In this case DC Offset introduces (10, 8, 10)
times of Vm, into the input signal, and gets the
results as shown in Figure 15. Figure 14(a-b),
displays the simulation results of SRF-PLL and
DIM with grid-connected 3-phase inverter during
DC offset conditions. Figure 15(a-b) shows a 3-
phase input voltage and output current. Figure 15(c-
d) shows FFT analysis SRF-PLL and DIM.
(a)
(b)
(c)
(d)
Fig. 15: Grid-connected Inverter SRF-PLL and DIM
during DC Offset. (a) Input and Output SRF-PLL.
(b) Input and Output DIM Output (C) FFT analysis
SRF-PLL (c) FFT analysis DIM
The 5th and 7th Harmonics are added into the
input signal and results as shown in Figure 16(a-b),
represents the simulation results of SRF-PLL and
DIM of input voltage and output current with grid
connected 3-phase inverter during harmonics.
Figure 16(c-d) shows the FFT analysis of SRF-PLL
and DIM.
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(a)
(b)
(c)
(d)
Fig. 16: Grid-connected Inverter SRF-PLL and DIM
during Harmonics Injection. (a) Input and Output of
SRF-PLL. (b) Input and Output DIM (C) FFT
analysis SRF-PLL (c) FFT analysis DIM
Table 3 shows the simulation results of PLL &
DIM in a Grid-tied Inverter. The DIM method
outperforms the SRF-PLL method with reduced
THDs.
Table 3. Comparison of PLL & DIM Grid Tied
Inverter
PLL
DISM
Ideal condition
0.002 s (Response
Time)
0.005 s (Response
Time)
DC offset
7.64 % THD
5 % THD
Harmonics
14.24 %THD
7.14 % THD
The art in the double integral principle is to remove
DC components without neither distortion nor phase
shifts. It will limit amplitude, removing DC in one
or two periods.The limitation ofDIM method is to
correct the amplitude and integrate constant in one
period.
5 Conclusion
This research work proposed DIM method for grid
synchronization in the presence of DC offset,
harmonics, voltage unbalances and frequency
unbalances. This method outperforms the SRF-PLL
method in mitigating the effects of DC offset,
harmonics,3-phase voltages, and frequency
unbalances and enabling precise synchronization
with the grid voltage. The SRF- PLL method shows
errors in tracking the distorted voltage waveforms.
The DIM method offers improved performance in
dealing with non ideal grid problems such as DC
offset, harmonics, and 3-phase voltage unbalances.
Linear lagging feedback, the circuit is developed,
that eliminates DC offset at each integrator as well
as phase error reduction. In future work, the DIM
method will be compared with other types of PLL
available in the literature.
References:
[1] Lu, Y.; Khan, Z.; Alvarez-Alvarado, M.;
Zhang, Y.; Huang, Z.; Imran, M. A Critical
Review of Sustainable Energy Policies for the
Promotion of Renewable Energy Sources.
Sustainability, 2020, 12, 5078,
https://doi.org/10.3390/su12125078.
[2] A. Qazi, F. Hussain, N. A. Rahim, G.
Hardaker, D. Alghazzawi, K. Shaban, and K.
Haruna, ''Towards sustainable energy: A
systematic review of renewable energy
sources, technologies, and public opinions,''
IEEE Access, vol. 7, pp. 63837-63851, 2019,
doi: 10.1109/access.2019.2906402.
[3] Zhang, L., Harnefors, L., & Nee, H.-P.
(2010). Power-Synchronization Control of
Grid-Connected Voltage-Source Converters.
IEEE Transactions on Power Systems, 25(2),
809–820, doi:10.1109/tpwrs.2009.2032231.
[4] Zou ,Z. -X. and M. Liserre, "Modeling Phase-
Locked Loop-Based Synchronization in Grid-
Interfaced Converters," in IEEE Transactions
on Energy Conversion, vol. 35, no. 1, pp. 394-
404, March 2020, doi:
10.1109/tec.2019.2939425.
[5] Guan-Chyun Hsieh and J. C. Hung, "Phase-
locked loop techniques. A survey," in IEEE
WSEAS TRANSACTIONS on POWER SYSTEMS
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Faheem Farooq, Kamran Hafeez,
Bayan Mahdi Sabbar, Mohannad Jabbar Mnati
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Volume 19, 2024
Transactions on Industrial Electronics, vol.
43, no. 6, pp. 609-615, Dec. 1996, doi:
10.1109/41.544547.
[6] Sai Jithendra Sampathi, Manish Kumar, "A
Comparative Evaluation of Different Grid
Synchronisation Techniques for Estimating
the Fundamental Frequency of Three-phase
Systems",1st International Conference on
Sustainable Technology for Power and
Energy Systems (STPES), SRINAGAR, India,
2022, pp. 1-6, doi:
10.1109/STPES54845.2022.10006645.
[7] N. Jaalam, N.A. Rahim, A.H.A. Bakar,
ChiaKwang Tan, Ahmed M.A. Haidar,’’A
comprehensive review of synchronization
methods for grid-connected converters of
renewable energy source’’, Renewable and
Sustainable Energy Reviews, vol. 59, pp.
1471-1481, 2016, doi:
10.1016/j.rser.2016.01.066.
[8] O. Vainio, S. J. Ovaska and M. Polla,
"Adaptive filtering using multiplicative
general parameters for zero-crossing
detection," in IEEE Transactions on
Industrial Electronics, vol. 50, no. 6, pp.
1340-1342, Dec. 2003, doi:
10.1109/TIE.2003.819565.
[9] McGrath BP, Holmes DG, Galloway JJH.
Power converter line synchronization using a
discrete Fourier transform (DFT) based on a
variable sample rate. IEEE Trans Power
Electronics, 20(4), 87784, 2005,
doi:10.1109/tpel.2005.850944.
[10] Yin G, Guo L, Li X. An amplitude adaptive
notch filter for grid signal processing. IEEE
Trans Power Electronics, 28(6):2638–41,
2013. doi:10.1109/tpel.2012.2226752
[11] Chen, L.-R. (2004). PLL-Based Battery
Charge Circuit Topology. IEEE Transactions
on Industrial Electronics, 51(6), 1344–1346.
doi: 10.1109/tie.2004.837891.
[12] Dash, P. K., Panda, G., Pradhan, A. K.,
Routray, A., & Duttagupta, B. (n.d.). An
extended complex Kalman filter for frequency
measurement of distorted signals. 2000 IEEE
Power Engineering Society Winter Meeting.
Conference Proceedings (Cat.
No.00CH37077). Singapore doi:
10.1109/pesw.2000.847576.
[13] M. Karimi Ghartemani, M. Mojiri, A. Safaee,
J. A. Walseth, S. A. Khajehoddin, P. Jain, and
A. Bakhshai, "A new phase-locked loop
system for three-phase applications," IEEE
Trans. Power Electronics, 2013, vol. 28, no.
3, pp. 1208-1218, doi:
10.1109/tpel.2012.2207967.
[14] Ciobotaru, M., Teodorescu, R., & Agelidis, V.
G. (2008). Offset rejection for PLL based
synchronization in grid-connected converters.
2008 Twenty-Third Annual IEEE Applied
Power Electronics Conference and
Exposition, Austin, TX, USA, pp.1611-7,
2008, doi:10.1109/apec.2008.45229.
[15] M. Karimi-Ghartemani, M.R. Iravani, A
method for synchronization of power
electronic converters in polluted and variable-
frequency environments, IEEE Trans. Power
Syst., 19, pp.1263–1270, 2004, doi:
10.1109/tpwrs.2004.83128.
[16] A. J., & Victoire, T. A. A,. ‘Enhanced PLL
based SRF control method for UPQC with
fault protection under unbalanced load
conditions’’. International Journal of
Electrical Power & Energy Systems, 58,
pp.319–328, 2014, doi:
10.1016/j.ijepes.2014.039.
[17] Jaalam, N., Rahim, N. A., Bakar, A. H. A.,
Tan, C., & Haidar. ‘’A comprehensive review
of synchronization methods for grid-
connected converters of renewable energy
source’’. Renewable and Sustainable Energy
Reviews, 59, pp.1471–1481, 2016, doi:
doi.org/10.1016/j.rser.2016.01.066.
[18] Ghoshal, A., & John, V,’’Performance
evaluation of three phase SRF-PLL and MAF-
SRF-PLL’’. Turkish Journal of Electrical
Engineering & Computer Sciences, 23(6),
pp.1781–1804. 2015, doi:10.3906/elk-1404-
488.
[19] Guo, X., Wu, W., & Chen, Z.,’’ Multiple-
complex coefficient-filter-based phaselocked
loop and synchronization technique for three-
phase grid-interfaced converters in distributed
utility networks’’. IEEE Transactions on
Industrial Electronics, 58(4), pp.1194–1204,
2011. doi: 10.1109/TIE.2010.2041738.
[20] Mohannad Jabbar Mnati, Dimitar V.
Bozalakov, and Alex Van den Bossche, "A
New Synchronization Technique of a Three-
Phase Grid Tied Inverter for Photovoltaic
Applications," Mathematical Problems in
Engineering, vol. 1,pp-1-18, 2018,
doi:10.1155/2018/7852642.
[21] S. Golestan, M. Monfared, and F. D. Freijedo,
‘‘Design-oriented study of advanced
synchronous reference frame phase-locked
loops,’’ IEEE Trans. Power Electron., vol. 28,
no. 2, pp. 765–778, Feb. 2013, doi:
10.1109/tpel.2012.2204276.
WSEAS TRANSACTIONS on POWER SYSTEMS
DOI: 10.37394/232016.2024.19.18
Faheem Farooq, Kamran Hafeez,
Bayan Mahdi Sabbar, Mohannad Jabbar Mnati
E-ISSN: 2224-350X
202
Volume 19, 2024
[22] J. M. V. Bikorimana, M. Jabbar, & A. Van
den "Frequency synchronization of a single-
phase grid-connected DC/AC inverter using a
double integration method", Automatika, Vol.
58, NO. 2, pp.141-146, 2017, doi:
10.1080/00051144.2017.1372122.
[23] Luo, W.; Jiang, J.; Liu, H. Frequency-
Adaptive Modified Comb-Filter-Based Phase-
Locked Loop for a Doubly-Fed Adjustable-
Speed Pumped-Storage Hydropower Plant
under Distorted Grid Conditions. Energies,
2017, 10, 737, doi: 10.3390/en10060737.
[24] M. Quraan, "Error Compensation Algorithm
for SRF-PLL in Three-Phase Grid-Connected
Converters," in IEEE Access, vol. 8, pp.
182338-182346, 2020, doi:
10.1109/access.2020.3028834.
[25] Lang, B., Zhang, H., Sun, L., Wang, B., &
Zheng, X. (2019). Design of Three Phase
Grid-Connected Inverter Based on Grid-
Voltage Oriented Control. 2019 Chinese
Control Conference(CCC), Guangzhou,China,
doi: 10.23919/chicc.2019.8865.
Contribution of Individual Authors to the
Creation of a Scientific Article (Ghostwriting
Policy)
- Faheem Farooq and Kamran Hafeez carried out
the simulations and paper wrting.
- Bayan Mahdi Sabbar and Mohannad Jabbar
Mnatii have helped in designing and overall
supervision of obtaining results.
Conflict of Interest
The authors have no conflicts of interest to declare.
Sources of Funding for Research Presented in a
Scientific Article or Scientific Article Itself
No funding was received for conducting this study.
Creative Commons Attribution License 4.0
(Attribution 4.0 International, CC BY 4.0)
This article is published under the terms of the
Creative Commons Attribution License 4.0
https://creativecommons.org/licenses/by/4.0/deed.en
_US
WSEAS TRANSACTIONS on POWER SYSTEMS
DOI: 10.37394/232016.2024.19.18
Faheem Farooq, Kamran Hafeez,
Bayan Mahdi Sabbar, Mohannad Jabbar Mnati
E-ISSN: 2224-350X
203
Volume 19, 2024