Tristate Converters
FELIX A. HIMMELSTOSS
Faculty of Electronic Engineering and Entrepreneurship,
University of Applied Sciences Technikum Wien,
Hoechstaedtplatz 6, 1200 Vienna,
AUSTRIA
Abstract: - In the continuous inductor current operation the tristate DC/DC converters have three modes. In the
first mode, the active switches are on and energy is transferred into the coil. In the second mode, the coil is
short-circuited and the current in the coils stays constant, and in the third mode, the free-wheeling diode takes
over the current. In the here used concept the active switch of the original converter is replaced by a series
connection of two active switches and an additional diode is connected to the connection point of the two
electronic switches. The other terminal of the diode is connected to the coil. This concept was originally
applied to the Boost converter. In this paper, it is shown that the same idea can be applied to other DC/DC
converters and the Buck and the Buck-Boost converters are shown. It is also possible to apply the concept to
converters of higher order. Here the Cuk, Zeta, and SEPIC are treated. It is also possible to apply it to quadratic
converters and the d-square converter is taken as an example. A converter with a reduced duty cycle is also
treated and a modification that avoids the inrush current is also shown. Finally, an improved superlift converter
is treated. The position of the zero of the transfer function is exemplarily studied.
Key-Words: - DC/DC converter, tristate converter, Buck, Boost, Zeta, SEPIC, Cuk, quadratic, reduced duty
cycle
Received: September 24, 2022. Revised: September 15, 2023. Accepted: Ocotber 17, 2023. Published: November 20, 2023.
1 Introduction
The starting point for this investigation is the paper,
[1], where a tristate Boost converter with coupled
coils is treated. The circuit behind this converter is
published in, [2], [3], [4], and a controller design is
treated in, [5]. A tristate Boost converter with a
topology with little reduced forward-losses is treated
in, [6], [7], and an extension with zero-voltage
switching (ZVS) can be found in, [8]. Another ZVS
concept is treated in, [9]. An interesting topology for
an inverting tristate Buck-Boost converter is shown
in, [10]. The basics of converters and many
topologies are described in all the textbooks on
Power Electronics, (e.g., [11], [12], [13]). It should
be mentioned that other concepts exist to achieve
tristate converters, [14]. The circuit diagram of the
tristate Boost converter is shown in Figure 1.
In the continuous operation, the converter has
three modes. The basic function is explained with
ideal components (no parasitic resistors and infinite
switching speed). In the first mode M1, both
electronic switches S1 and S2 are on, the input
voltage U1 is across the inductor L1, and the current
increases. When S1 is turned off, the second mode
M2 begins. Now diode D1 turns on and the inductor
L1 is short-circuited. The current through the coil
stays constant. When S2 is turned off, too, diode D2
turns on, and the difference between the input and
the output voltages is across the inductor, and the
current decreases.
Fig. 1: Tristate Boost converter
The voltage-time balance in a steady state is
therefore
TdUUTdU 22111 1
(1)
and the voltage transformation rate is achieved to
2
21
1
2
1
1
d
dd
U
U
M
. (2)
Figure 2 shows the voltage transformation ratio
for d2 as a parameter and d1 as the independent
variable. The most interesting feature of this
WSEAS TRANSACTIONS on POWER SYSTEMS
DOI: 10.37394/232016.2023.18.27
Felix A. Himmelstoss
E-ISSN: 2224-350X
259
Volume 18, 2023
converter is that the voltage transformation ratio is
now linear for a constant duty cycle of switch S2. In
the figure also the transformation ratio of the normal
Boost converter is shown (the nonlinear line).
Fig. 2: Voltage transfer ratio for the tristate Boost
converter: d1 variable and d2 as parameter
Figure 3 shows the voltage across the coil, the
current through the inductor, the load current, the
input and the output voltages, and the control
signals of the switches in the steady state. All
simulations are done with capacitor values of
330 µF and inductor values of 47 µH, an input
voltage of 48 V, except when other values are given.
Fig. 3: Tristate Boost converter (up to down):
voltage across coil L1 (grey); current through the
inductor L1 (red), current through the load (violet);
output voltage (green), input voltage (blue), a
control signal for switch S2 (black, shifted), a
control signal for switch S2 (turquoise)
2 Basic Tristate Converters
First, the other basic converters are changed into a
tristate one.
2.1 Tristate Buck
The tristate Buck converter is shown in Figure 4.
When both switches are on, the difference between
the input voltage and the output voltage is across the
inductor, and the current increases. When S1 turns
off and S2 is still on, the current through the coil
commutates into D1. The current stays nearly
constant. When S2 is turned off too, the current
commutates into the diode D2 and is free-wheeling.
Now the negative output voltage is across the coil
and the current decreases.
Fig. 4: Tristate Buck converter
The voltage-time balance can be written with
the help of the duty cycles for both switches d1 and
d2 (the duty cycle is defined by the on-time of the
active switch referred to as the switching period)
according to
TdUTdUU )1()( 22121
(3)
leading to the voltage transformation ratio
21
1
1
2
1dd
d
U
U
M
. (4)
The connection between the load current and the
mean value of the current through the coil can be
found by the charge balance of the capacitor. With
the mean value of the inductor current
one can
write
12
_
21 1ddIIIdd LOADLOAD
L
. (5)
The mean value of the current through the coil
is therefore
21
_
1dd
I
ILOAD
L
. (6)
Figure 5 shows the voltage across the coil, the
current through the inductor, the load current, the
input and the output voltages, and the control
signals for the switches in the steady state.
WSEAS TRANSACTIONS on POWER SYSTEMS
DOI: 10.37394/232016.2023.18.27
Felix A. Himmelstoss
E-ISSN: 2224-350X
260
Volume 18, 2023
Fig. 5: Tristate Buck converter (up to down):
voltage across the inductor L1 (grey); current
through the inductor L1 (red), current through the
load (violet); output voltage (green), input voltage
(blue), a control signal for switch S2 (black,
shifted), a control signal for switch S2 (turquoise)
Figure 6 shows the voltage transformation ratio
for d2 as a parameter and d1 as the independent
variable. The linear line corresponds to the normal
Buck converter. The voltage transformation ratios
for a constant duty cycle of the second switch are
nonlinear.
Fig. 6: Voltage transformation ratio for the tristate
Buck converter d1 variable and d2 as parameter
2.2 Tristate Buck-Boost
Applying the tristate concept to the Buck-Boost
converter leads to the circuit diagram Figure 7.
Fig. 7: Tristate Buck-Boost converter
When both switches (during the time interval
Td1
) are on, the input voltage is across the coil.
When S1 is turned off and S2 is still on (during the
time interval
Tdd 12
), the inductor is short-
circuited by S2 and D1 and the current stays nearly
constant. When S2 is turned off, D2 turns on and the
current free-wheels through D2. Now the negative
output voltage is across the coil and the current
decreases.
The voltage-time balance
TdUTdU )1( 2211
(7)
leads to the voltage transformation ratio
2
1
1
2
1d
d
U
U
M
. (8)
Figure 8 shows the voltage across the coil, the
current through the inductor, the load current, the
input and the output voltages, and the control
signals of the switches in the steady state.
Figure 9 shows the voltage transformation ratio
for d2 as a parameter and d1 as the independent
variable. The most interesting feature of this
converter is that the voltage transformation ratio is
now linear for a constant duty cycle of switch S2. In
the figure also the transformation ratio of the normal
Buck-Boost is shown (the nonlinear line).
Fig. 8: Tristate Buck-Boost converter (up to down):
voltage across the inductor L1 (grey); current
through the inductor L1 (red), current through the
load (violet); output voltage (green), input voltage
(blue), control signal for switch S2 (black, shifted),
control signal for switch S2 (turquoise)
WSEAS TRANSACTIONS on POWER SYSTEMS
DOI: 10.37394/232016.2023.18.27
Felix A. Himmelstoss
E-ISSN: 2224-350X
261
Volume 18, 2023
Fig. 9: Voltage transformation ratio for the tristate
Buck-Boost converter with d1 variable and d2 as
parameter
3 Higher order Tristate Converters
3.1 Tristate Zeta Converter
The circuit diagram of the tristate Zeta converter is
shown in Figure 10. When both switches are on, the
input voltage is across L1, when only S2 is on, a
short-circuit of L1 occurs and the current stays
nearly constant, and when S2 turns off too, the
negative voltage across C1 is across the inductor
and the current decreases. The voltage across C1 is
equal to the output voltage during steady-state (the
loop C1, L2, C2, L1 is always valid, and the mean
value of the voltages across the coils must be zero).
Fig. 10: Tristate Zeta converter
The voltage-time balance across L1 can be written
according to
TdUTdU C)1( 2111
. (9)
The voltage across C1 can be found by looking at
the loop L1, C1, L2, C2 which is always valid to
21 UUC
(10)
leading again to the voltage transformation ratio of
the Buck-Boost converter (Figure 9)
2
1
1
2
1d
d
U
U
M
. (11)
Figure 11 shows the voltage across the coil L1,
the current through the inductors L1 and L2, the
input and the output voltages, and the control
signals for the switches in the steady state.
Fig. 11: Tristate ZETA converter (up to down):
voltage across the inductor L1 (grey); current
through the inductor L1 (red), current through the
inductor L2 (violet); output voltage (green), input
voltage (blue), a control signal for switch S2 (black,
shifted), a control signal for switch S2 (turquoise)
3.2 Tristate Cuk Converter
In Figure 12 the circuit diagram of the Cuk
converter which was transferred into a tristate one is
shown. During the time interval, when both
switches are on, the input voltage is across L1, and
the current increases. When only S2 is on, the
current through L1 is shunted by the diode D2 and
the current stays nearly constant. When both
switches are turned off, the current through L1 free-
wheels through C1, D2, and back to the input
source. Now the difference between the input
voltage and the voltage across C1 is across the coil
L1. The voltage across C1 is equal to the sum of the
input and the output voltages.
Fig. 12: Tristate Cuk converter
The voltage-time balance across L1 is therefore
given according to
TdUUTdU C)1( 21111
. (12)
The voltage across C1 can be found by looking at
the outer loop to
211 UUUC
(13)
WSEAS TRANSACTIONS on POWER SYSTEMS
DOI: 10.37394/232016.2023.18.27
Felix A. Himmelstoss
E-ISSN: 2224-350X
262
Volume 18, 2023
leading again to the voltage transformation ratio of
the Buck-Boost converter (Figure 9)
2
1
1
2
1d
d
U
U
M
. (14)
Figure 13 shows the voltage across the coil L1,
the current through the inductors L1 and L2, the
input and the output voltages, and the control
signals of the switches in the steady state.
Fig. 13: Tristate CUK converter (up to down):
voltage across the inductor L1 (grey); current
through the inductor L1 (red), current through the
inductor L2 (violet); output voltage (green), input
voltage (blue), control signal for switch S2 (black,
shifted), control signal for switch S1 (turquoise)
3.3 Tristate SEPIC Converter
The tristate Sepic converter is depicted in Figure 14.
During the on-time of both switches the positive
input voltage is across the inductor L1. This coil is
short-circuited when S1 is turned off. When S2 is
also turned off, the input voltage minus the sum of
the voltages across the output and the capacitor C1
is across L1. Now one can write for the voltage-time
balance across L1
2211 1dUdU
(15)
which leads to the voltage transformation ratio
(equal to that of the Buck-Boost converter, Figure 9)
2
1
1
2
1d
d
U
U
M
. (16)
Fig. 14: Tristate Sepic converter
Figure 15 shows the voltage across the coil L1,
the current through the inductors L1 and L2, the
input and the output voltages, and the control
signals for the switches in the steady state. The
inductor values for this simulation are different from
the ones that were used in the other simulations
(L1=25 µH, L2=100 µH). Therefore, the current
ripple through L1 is large.
Fig. 15: Tristate Sepic converter with L1=25 µH and
L2=100 µH (up to down): voltage across the
inductor L1 (grey); current through the inductor L1
(red), current through the inductor L2 (violet);
output voltage (green), input voltage (blue), a
control signal for switch S2 (black, shifted), a
control signal for switch S2 (turquoise)
3.4 Tristate D-Square Converter
The tristate D-square converter is shown in
Figure 16. In its original topology, [15], this
converter has only one switch and three diodes. The
converter is especially useful for higher voltages
and powers when IGBTs are used because diodes
have a lower forward voltage than IGBTs. The
voltage transformation ratio is the square of the duty
cycle.
During M1 the input voltage minus the voltage
across C1 is across L1 (when S1 and S2 are on, also
D2 is on), during M2 the voltage is zero, and during
the off-time of S2, the negative capacitor voltage of
C1 is across L1. The voltage-time balance can be
written according to
21111 1dUdUU CC
. 17)
The voltage across C1 can therefore be calculated
according to
1
21
1
11U
dd
d
UC
. (18)
During M1 the voltage across L2 is the
difference between the voltage across C1 and the
output voltage U2. When S1 is off during M2 and
WSEAS TRANSACTIONS on POWER SYSTEMS
DOI: 10.37394/232016.2023.18.27
Felix A. Himmelstoss
E-ISSN: 2224-350X
263
Volume 18, 2023
M3, the negative output voltage is across L2. The
voltage-time balance is therefore
12121 1dUdUUC
. (19)
The output voltage can now be written by
112 dUU C
. (20)
The voltage transformation ratio can now be given
according to
21
2
1
1
2
1dd
d
U
U
. (21)
Fig. 16: Tristate d-square converter
Figure 17 shows the voltage transformation
ratio for d2 as a parameter and d1 as independent
variable. The quadratic line corresponds to the
normal quadratic Buck converter. The voltage
transformation ratios for a constant duty cycle of the
second switch are slightly nonlinear.
Fig. 17: Voltage transfer ratio for the tristate d-
square converter, d1 variable and d2 as parameter
Figure 18 shows the voltage across the coil L1,
the current through the inductors L1 and L2, the
input and the output voltages, and the control
signals for the switches in the steady state.
Fig. 18: Tristate d-square converter (up to down):
voltage across the inductor L1 (grey); current
through the inductor L1 (red), current through the
inductor L2 (violet); input voltage (blue), a control
signal for switch S2 (black, shifted), a control signal
for switch S2 (turquoise), output voltage (green)
3.5 Tristate (2d-1)/(1-d) Converter
This is a very special converter type and the circuit
diagram is depicted in Figure 19.
Fig. 19: Tristate (2d-1)/(1-d) converter
Again the converter has three modes. During
mode M1 both electronic switches S1 and S2 are on,
and the input voltage is across the first coil L1.
Mode M2 starts when S1 is turned off and is an
idling mode. The current through L1 stays constant
because now the coil L1 is short-circuited by the
diode D1 and the electronic switch S2. When S2 is
turned off, D2 turns on and the negative voltage of
the capacitor C1 is across the coil L1, and the
current through it decreases. The voltage-time
balance is therefore
TdUUTdUTdU C)1()1( 221211
(22)
leading to
2
21
1
2
1
1
d
dd
U
U
M
. (23)
A very interesting aspect of this converter is that
compared to the original converter which has the
voltage transformation ratio
WSEAS TRANSACTIONS on POWER SYSTEMS
DOI: 10.37394/232016.2023.18.27
Felix A. Himmelstoss
E-ISSN: 2224-350X
264
Volume 18, 2023
d
d
U
U
M
1
12
1
2
(24)
which reduces the duty cycle to a value greater
than 0.5, now lower duty cycles are possible,
depending on the duty cycle of switch S2.
Figure 20 shows the voltage transformation
ratio for d2 as a parameter and d1 as the
independent variable. The most interesting feature
of this converter is that the voltage transformation
ratio is now linear for a constant duty cycle of
switch S2. In the figure, the transformation ratio of
the normal (2d-1)/(1-d) converter is shown (the
nonlinear line). The graphs are only valid for M
greater than zero. So one can see that for d2 of 90 %
a d1 of greater than 10 % is possible, or for d2=0.8 a
d1 greater than 20 % can be used.
Fig. 20: Voltage transformation ratio for the tristate
(2d-1)/(1-d) converter: d1 variable and d2 as
parameter
Figure 21 shows the voltage across the coil L1,
the current through the inductors L1 and L2, the
input and the output voltages, and the control
signals of the switches in the steady state for a
combination of duty cycles greater than 50 % (60 %
and 80 %). Figure 22 shows the same signals for
d1=33 % and d2=80 %.
Fig. 21: Tristate (2d-1)/(1-d) converter with
U1=24 V, d1=60 % and d2=80 % (up to down):
voltage across the inductor L1 (grey); current
through the inductor L1 (red), current through the
inductor L2 (violet); input voltage (blue), control
signal for switch S2 (black), control signal for
switch S2 (turquoise), output voltage (green)
Fig. 22: Tristate (2d-1)/(1-d) converter with
U1=24 V, d1=33 % and d2=80 % (up to down):
voltage across L1 (grey); current through L1 (red),
current through L2 (violet); load current (brown);
input voltage (blue), control signal for S2 (black,
shifted), control signal for S1 (turquoise), output
voltage (green)
Another interesting and important aspect of
converters is the inrush current when the converter
is applied to a stable input voltage. Figure 23 shows
the inrush of the converter. A damped ringing with
high amplitude at the beginning occurs. The output
voltage is positive at the beginning (the converter is
an inverting one) and not negative during the inrush.
This can be dangerous for the applied load.
Fig. 23: Tristate (2d-1)/(1-d) converter inrush, up to
down: input current (red); input voltage (blue),
output voltage (green)
To avoid the inrush, a small modification of the
converter has to be done, as shown in the next
paragraph.
3.6 Tristate (2d-1)/(1-d) Converter Type 2A
The basic converter topology is shown in, [16], and
the tristate version is given in Figure 24. Other
WSEAS TRANSACTIONS on POWER SYSTEMS
DOI: 10.37394/232016.2023.18.27
Felix A. Himmelstoss
E-ISSN: 2224-350X
265
Volume 18, 2023
modified converters with reduced duty cycle are
presented in, [17], and can also be transformed into
tristate ones. Figure 25 shows the inrush into this
converter. The modification of the position of the
second capacitor avoids a large inrush current which
stresses all components. The voltage transformation
ratio is shown in Figure 20.
Fig. 24: Modified tristate (2d-1)/(1-d) converter type
2A
Fig. 25: Tristate (2d-1)/(1-d) converter type 2A,
inrush (up to down): input current (red); input
voltage (blue), output voltage (green)
Figure 26 shows the voltage across the coil L1,
the current through the inductors L1 and L2, the
input and the output voltages, and the control
signals for the switches in the steady state for a
combination of duty cycles greater than 50 %.
Fig. 26: Tristate (2d-1)/(1-d) converter type 2A, (up
to down): voltage across L1 (grey); current through
L1 (red), current through L2 (violet); load current
(brown); input voltage (blue), control signal for S2
(black, shifted), control signal for S1 (turquoise),
output voltage (green)
3.7 Tristate Improved Superlift Converter
Superlift converters, [18], are another interesting
topology. The original converter, [19], has large
peaks in the input current. This can be avoided when
a small inductor L2 is placed in series to the diode
D1, [20]. The circuit diagram can be seen in
Figure 27. When both electronic switches are on in
mode M1, the capacitor C1 is charged and during
M3 the voltage across the capacitor C1 decreases. In
the mean, the voltage across C1 must be equal to the
input voltage U1.
Fig. 27: Improved positive output super-lift Boost
converter
During M1 U1 is across the inductor, during M2
the voltage across it is zero, and during M3 the input
voltage plus the voltage across C1 minus the output
voltage is across the coil L1. The voltage-time
balance is therefore
)1(2 22111 dUUdU
(25)
leading to
2
21
1
2
1
22
d
dd
U
U
M
. (26)
Figure 28 shows the voltage transformation
ratio for d2 as a parameter and d1 as the
independent variable. Again the curves are
linearized.
Fig. 28: Voltage transformation ratio for the tristate
improved positive output super-lift Boost converter:
d1 variable and d2 as parameter
WSEAS TRANSACTIONS on POWER SYSTEMS
DOI: 10.37394/232016.2023.18.27
Felix A. Himmelstoss
E-ISSN: 2224-350X
266
Volume 18, 2023
Figure 29 shows the voltage across the coil L1,
the current through the inductors L1 and L2, the
input and the output voltages, and the control
signals for the switches in the steady state. Also, the
current through the inductor L2 which charges the
capacitor C1 is depicted.
Fig. 29: Improved positive output super-lift Boost
converter, (up to down): current through L2 (dark
green); voltage across L1 (grey); current through L1
(red), current through L2 (violet); load current
(brown); input voltage (blue), control signal for S2
(black, shifted), control signal for S1 (turquoise),
output voltage (green)
4 Position of the Zero
Converters with the possibility to increase the
output voltage over the input voltage, like the Boost,
Buck-Boost, Cuk, Sepic, etc. are non-phase-
minimum systems, which means they have a zero on
the right side of the complex plane RHZ (right half-
plane zero). RHZs influence the phase and lead to
further negative phase shifts. To stabilize the
control, a lower crossover frequency is necessary
and the whole system gets slower.
To calculate the zero, a linear dynamic model
must be derived and the transfer functions
ascertained. This is shown now for the tristate Buck-
Boost converter. The state equation during M1 are
1
11
L
u
dt
diL
1
111 /
C
Ru
dt
du CC
, (27)
during M2
1
10
Ldt
diL
1
111 /
C
Ru
dt
du CC
, (28)
and during M3
1
1
1
L
u
dt
di C
L
1
1111 /
C
Rui
dt
du CLC
. (29)
Mode M1 must be weighted by d1, mode M3
must be weighted by (1-d2) and the discharge of the
capacitor by the load current is valid all the time.
This leads to the large signal model
1
1
1
1
1
11
2
1
2
1
1
0
1
1
1
0
u
L
d
u
i
RCC
d
L
d
u
i
dt
d
C
L
C
L
. (30)
To get transfer functions of the converter for
drawing Bode plots and to design controllers, (30)
has to be linearized by the perturbation ansatz. The
variables are written as the operating point value,
written with a capital letter and a zero in the index,
plus a small disturbance, written with small letters
with a roof on top. Linearization leads to
2
1
1
1
10
1
10
1
10
1
10
1
1
11
20
1
20
1
1
00
1
1
1
0
d
d
u
C
I
L
U
L
U
L
D
u
i
RCC
D
L
D
u
i
dt
d
L
C
C
L
C
L
. (31)
With abbreviations, one can write (32)
2
1
1
23
131211
1
1
2221
12
1
1
00
0
d
d
u
B
BBB
u
i
AA
A
u
i
dt
d
C
L
C
L
.
Laplace transformation leads to (33)
)(
)(
)(
00)(
)(
2
1
1
23
131211
1
1
2221
12
sD
sD
sU
B
BBB
sU
sI
AsA
As
C
L
.
The denominator is the same for all transfer
functions
211222
2AAsAsDen
. (34)
The numerator of the transfer function between
capacitor (output) voltage and the duty cycle of
switch S1 can be calculated according to
1221
21
12
0
11 BA
A
Bs
DNumUC
. (35)
The transfer function has no zero and describes
a phase-minimum system.
The numerator of the transfer function between
capacitor (output) voltage and the duty cycle of
switch S2
WSEAS TRANSACTIONS on POWER SYSTEMS
DOI: 10.37394/232016.2023.18.27
Felix A. Himmelstoss
E-ISSN: 2224-350X
267
Volume 18, 2023
132123
2321
13
21 BAsB
BA
Bs
DNumUC
(36)
has a zero on the right half-plane, because B23 is
negative. This transfer function describes a non-
phase-minimum system.
The conclusion is therefore: one has to control
the duty cycle of switch S1 and use a constant duty
cycle of switch S2.
As a second example, the modified tristate (2d-
1)/(1-d) converter Type 2A is used. In the same
way, as shown before the small signal model is
derived according to
2
1
1
2
1
10
2
10
1
10
1
10
1
10
2
1
2
1
22
1
20
1
20
22
20
1
20
2
1
2
1
00
1
00
00
1
0
1
0
00
1
1
00
0
1
00
d
d
u
RC
C
I
L
U
L
U
L
U
L
D
u
u
i
i
RCC
C
D
C
D
LL
D
L
D
u
u
i
i
dt
d
L
C
C
C
C
L
L
C
C
L
L
(37)
This results again in a numerator for the transfer
function between the voltage across C2 and the duty
cycle d1
12423123
12 BAAADNumUC
(38)
which has no zero and therefore results in a
phase minimum system.
5 Conclusion
Tri-state converters, achieved by the method used
here, have some very interesting features:
An additional degree of freedom in the
voltage transformation ratio
Linearized voltage transformation ratio for
converters with step-up capability
Phase minimum system for constant duty
cycle of the second switch for converters
with step-up possibility
The concept can be used for many other DC/DC
converter topologies.
References:
[1] G M. A. Vaghela and M. A. Mulla, Tri-State
Coupled Inductor Based High Step-Up Gain
Converter Without Right Hand Plane Zero,
IEEE Transactions on Circuits and Systems
II: Express Briefs, vol. 70, no. 6, pp. 2291-
2295, June 2023,
doi: 10.1109/TCSII.2023.3237679.
[2] K. Viswanathan, R. Oruganti and D.
Srinivasan, Dual-mode control of tri-state
boost converter for improved performance,
IEEE Transactions on Power Electronics, vol.
20, no. 4, pp. 790-797, July 2005,
doi: 10.1109/TPEL.2005.850907.
[3] K. Viswanathan, R. Oruganti and D.
Srinivasan, A novel tri-state boost converter
with fast dynamics, IEEE Transactions on
Power Electronics, vol. 17, no. 5, pp. 677-
683, Sept. 2002,
doi: 10.1109/TPEL.2002.802197.
[4] S. K. Viswanathan, R. Oruganti and D.
Srinivasan, Dual mode control of tri-state
boost converter for improved performance,
IEEE 34th Annual Conference on Power
Electronics Specialist, Acapulco, Mexico,
2003, pp. 944-950 vol.2,
doi: 10.1109/PESC.2003.1218182.
[5] S. Sarkar, A. Ghosh and S. Banerjee, Design
and implementation of type-III controller in tri
state boost converter, 2015 Annual IEEE
India Conference (INDICON), New Delhi,
India, 2015, pp. 1-6,
doi: 10.1109/INDICON.2015.7443152.
[6] K. Viswanathan, R. Oruganti and D.
Srinivasan, Tri-state boost converter with no
right half plane zero, 4th IEEE International
Conference on Power Electronics and Drive
Systems. IEEE PEDS 2001 - Indonesia.
Proceedings (Cat. No.01TH8594), Denpasar,
Indonesia, 2001, pp. 687-693 vol.2.
[7] S. Kapat, A. Patra and S. Banerjee, A novel
current controlled tri-state boost converter
with superior dynamic performance, 2008
IEEE International Symposium on Circuits
and Systems, Seattle, WA, USA, 2008, pp.
2194-2197.
[8] K. Kumar, N. Rana, S. Banerjee, S. B. Santra
and N. Parvez, Design and analysis of soft-
switched tri-state boost converter, 2018
International Conference on Power,
Instrumentation, Control and Computing
(PICC), Thrissur, India, 2018, pp. 1-6.
[9] O. Knecht, D. Bortis and J. W. Kolar, ZVS
Modulation Scheme for Reduced Complexity
Clamp-Switch TCM DC–DC Boost
WSEAS TRANSACTIONS on POWER SYSTEMS
DOI: 10.37394/232016.2023.18.27
Felix A. Himmelstoss
E-ISSN: 2224-350X
268
Volume 18, 2023
Converter, IEEE Transactions on Power
Electronics, vol. 33, no. 5, May 2018, pp.
4204-4214.
[10] N. Rana and S. Banerjee, Interleaved Tri-state
Buck-Boost Converter with Fast Transient
Response and Lower Ripple, 2019 IEEE
Transportation Electrification Conference
(ITEC-India), Bengaluru, India, 2019, pp. 1-5.
[11] N. Mohan, T. Undeland and W. Robbins,
Power Electronics, Converters, Applications
and Design, 3nd ed. New York: W. P. John
Wiley & Sons, 2003.
[12] F. Zach, Power Electronics, in German:
Leistungselektronik, Frankfurt: Springer, 6th
ed., 2022.
[13] Y. Rozanov, S. Ryvkin, E. Chaplygin, P.
Voronin, Power Electronics Basics, CRC
Press, 2016.
[14] F. A Himmelstoss, Concept to change the
voltage transformation ratio of a DC/DC
converter, Cukurova 9th International
Scientific Researches Conference, Adana,
Turkey, October 9-11, 2022, pp. 258-273,
ISBN: 978-625-8246-28-5.
[15] D. Maksimovic, and S. Cuk: Switching
converters with wide DC conversion range,
IEEE Transactions on Power Electronics, vol.
6, January 1991, pp. 151 – 157.
[16] F. A. Himmelstoss, and M. Jungmayer, A
Family of Modified Converters with Limited
Duty Cycle, 2021 International Aegean
Conference on Electrical Machines and
Power Electronics (ACEMP) & 2021
International Conference on Optimization of
Electrical and Electronic Equipment
(OPTIM), Brasov, Romania, 2021, pp.246-
253.
[17] F. A. Himmelstoss, and K. H. Edelmoser, A
Topology to generate DC/DC, AC/DC,
DC/AC, and AC/AC Converters, 2021 25th
International Conference on Circuits,
Systems, Communications and Computers
(CSCC), 2021 pp. 102-110.
[18] Fang Lin Luo, Six self-lift DC-DC converters,
voltage lift technique, IEEE Transactions on
Industrial Electronics, vol. 48, no. 6, Dec.
2001, pp. 1268-1272.
[19] Fang Lin Luo and Hong Ye, Positive output
super-lift converters, IEEE Transactions on
Power Electronics, vol. 18, no. 1, Jan. 2003,
pp. 105-113.
[20] F. A. Himmelstoss, Improved positive output
voltage super-lift Boost converter, WSEAS
Transactions on Power Systems, Vol. 17,
2022, E-ISSN: 2224-350X, pp. 68-75.
https://doi.org/10.37394/232016.2022.17.8
Contribution of Individual Authors to the
Creation of a Scientific Article (Ghostwriting
Policy)
The author contributed in the present research, at all
stages from the formulation of the problem to the
final findings and solution.
Sources of Funding for Research Presented in a
Scientific Article or Scientific Article Itself
No funding was received for conducting this study.
Conflict of Interest
The author has no conflicts of interest to declare.
Creative Commons Attribution License 4.0
(Attribution 4.0 International, CC BY 4.0)
This article is published under the terms of the
Creative Commons Attribution License 4.0
https://creativecommons.org/licenses/by/4.0/deed.en
_US
WSEAS TRANSACTIONS on POWER SYSTEMS
DOI: 10.37394/232016.2023.18.27
Felix A. Himmelstoss
E-ISSN: 2224-350X
269
Volume 18, 2023