Low Noise Operational Amplifier using Current Driving Bulk by

CMOS Technology

VASUDEVA G.1,

BHARATHI GURURAJ

1Department of ECE, Dayananda Sagar Academy of Technology and Management,

Bangalore,

INDIA

Department of ECE, ACS College of Engineering,

Bangalore

INDIA

Abstract: - A reverse substrate bias operational amplifier using existing driver technology has been designed

and implemented using 0.25μm CMOS process to achieve high noise performance. Op amps are efficient and

versatile devices. Its applications include signal conditioning, custom conversion, analog equipment,

competitive simulation, and various electronic industries meeting custom design requirements. As the trend of

low voltage devices continues, designing high-performance analog circuits becomes increasingly difficult. The

main module of analog circuits is the work amplifier. In large electronic devices, there is a trade-off between

speed, power, and gain, among other drawbacks. Additionally, in order to reduce costs and integrate analog and

digital circuits on a single die, analog designers must face the challenges of using the CMOS process. Design

and implementation are done in 0.25μm technology using TSMC libraries and with the help of Tanner tools.

Key-Words: – Operational amplifier, Bulk driven technology, Low voltage, TSPICE, Low noise,TSMC

Library,CMOS,Tanner.

Received: March 21, 2023. Revised: October 24, 2023. Accepted: December 4, 2023. Published: December 31, 2023.

1 Introduction

Op-amps are a good example of how simple

circuits can be combined to accomplish complex

tasks, [1]. An op amplifier is an amplifier with

sufficient forward gain such that when negative

feedback is used, [2], the closed-loop converter will

have a positive effect on the op amplifier's gain,

[3]. Operational amplifiers are the most widely

used of all circuits in manufacturing, [4]. The input

transistor of the op-amp plays an important role in

the overall noise because the noise of the transistor

interacts with the input of the op-amp, [5]. Low

noise is inevitable in CMOS technology, so there is

a strong need to use designs that reduce noise.

Analog designers face the challenge of designing

low-noise amplifiers while taking advantage of the

unique features of CMOS technology, [6]. An

operational amplifier ("op-amp") is a DC-coupled,

high-gain electronic voltage amplifier with variable

inputs and usually a single output, [7]. The output

voltage produced by an operational amplifier is

usually hundreds of thousands of times greater than

the differential voltage of the input power, [8].

Operating amplifier is an important building

block of various electronic circuits. They originate

from analog computers and are used in many linear,

nonlinear and frequency-dependent circuits, [9].

Their popularity in electrical engineering is mainly

due to the fact that the final characteristics (e.g.

gain) are set by external devices and are less

dependent on temperature and variation of the op

amp itself, [10]. Operational amplifiers are one of

the most widely used electronic devices today and

are widely used in consumer, commercial and

research devices, [11]. Due to the complexity of the

process and technology, VLSI technology has

developed rapidly, [12]. Due to the density, low

voltage, and limited features of standard CMOs,

Cmos operates more efficiently than competing

implementations. Operational amplifier is a type of

differential amplifier, [13]. Other types of

differential amplifiers include fully differential

amplifiers (similar to op amplifiers, but with two

outputs), instrumentation amplifiers (usually

consisting of three op amplifiers), isolation

amplifiers (similar to instrumentation amplifiers,

but with tolerances for different voltages of the op

amplifier), [14], and negative feedback (usually

consisting of one or more op amps and a power

feedback loop), [15].

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Vasudeva G., Bharathi Gururaj

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In the paper, the low noise operational

amplifier with current drive bulk technique using

0.25µm CMOS process is presented. The power

dissipated is less than 3mv. Using this current drive

bulk technique, the threshold voltage required for

transistors can be reduced and speed can be

increased, [16]. The paper is organized is as

follows. In section II, current drive bulk technology

is reviewed. Section III describes noise analysis. In

section IV, a Simulation result is discussed. Section

V, finally draws a conclusion.

2 Current Bulk Driven Technology

The operating mode of body-driven MOSFET is

depletion mode . Set the gate voltage to a value

sufficient to turn on the transistor. Input voltage is

then applied to the physical terminal of the

transistor (e.g. positive) to change the current

flowing through the transistor. The advantage of the

physical drive compared to the driver board is that

the starting voltage limit is eliminated and both

positive and negative are possible, [17].

(1)

The equation-1describes pickup voltage of the

MOS transistor as:

a function of the VBS body source voltage is

calculated as:

Where

VTHO zero bias threshold voltage,

γ bulk effect factor,

Ø Fermi potential

For p channel transistors, 2ØF=- 0.7V, γ=-

0.5V and Vth0=-0.6V, typically And the volume is

usually >0V, which increases the starting voltage.

However, we can reduce the threshold voltage by

matching VBS<0V, [18]. We want the body's

negative pressure to be as high as possible in order

to keep the radiation level as low as possible. But

this will refer to the body-source diode (for

example, the base-emitter diode of a parasitic

bipolar transistor (BJT), so turn on the BJT).

Therefore, VBS is limited to the current value that

the BJT can handle, [19]. This is the concept of the

new Current Driven Body (CDB) circuit. Current-

driven lumped differential pairs in op-amps greatly

increase the input multimode diversity because the

lumped driver element allows the input diversity to

be nicely coupled to the buffer By properly

designing the discrete drivers, the device can

maintain the satisfaction of the entire rail-to-rail

ICMR, [20]. Running the current system can have

many negative effects on the end device.

Fig 1: Circuit diagram of low noise amplifier

Driving equipment has the ability to allow its

inputs to be extended to the greatest possible

disadvantage, [21]. Designing the input stage of the

op-amp using different components effectively

improves the input mode multi-mode (ICMR) and

mode rejection ratio (CMRR) compared to using a

driver board, [22].

3 Low Noise Amplifier Design

This operational amplifier is designed using TSMC

0.25um CMOS process. In this design, the PMOS

transistor was chosen as a different introduction to

the CMOS technology of the P chip because the n-

well (the body of the PMOS transistor) can be

connected to a potential different from the quality

of electronic products. , when the sheet NMOS

Common follows the transistor body. PMOS

transistors can be made with n-hole insulation . In

the case of constant MO tail current. It should be

said that the substrate offset must be optimized in

different inversion areas to reduce noise.

Additionally, the body-cavity junction current

cannot exceed the maximum value, [23]. Only

when the conditions are met, operation of MOS

transistor under weak inversion can achieve better

noise than under strong inversion, [24]. Low

voltage is taken into account, [25]. This article

creates a folded cascode because fast stabilization

amplifiers, interface circuits, switched capacitor

filters, ADCs, DACs, etc., [26]. It is widely used in

electronic data processing applications such as and

provides higher operating frequency and

better power, [27]. Provides noise suppression. The

scheme of the discussion is shown in the

Figure. 1 with current driving bulk (CDB) for

input differential pair.

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Vth = Vth0 + γ ( 2F- VBS) -  | 2F|

Vth = Vth0 + γ ( 2F - VBS) -  | 2F|

Negative voltage must be applied from VB1

to VB4. The input transistor of the op-amp plays

an important role in the noise in the circuit because

the noise of the following transistors also includes

the input of the op amp. The circuit design has

four advantages: high voltage, low dissipation,

low distortion and small capacitance value. In

strong inversion, noise is found to be roughly

independent of the substrate offset VBS. On the

contrary, the forward biased body increases the

low noise of PMOS transistors by 8dB/V, but the

expected noise of VBS does not smell of weak

inversion, while the dependence on strong

inversion increases.

4 Noise Analysis

In our design, PMOS with reverse substrate

bias and operating in the saturation region

should be selected as the input difference pair

to reduce vibration noise, and at the same

time, existing driver technology should be

applied. This circuit works well in the

subthreshold region compared to the saturation

region . But the problem is that the design circuit

only works in the subthreshold area when vbs <

vth, so consider this is beyond the saturation

condition of our design and we need to return the

substrate bias and not the front substrate bias in

our design. Therefore, it is recommended to use

PMOS to use current driver devices such as

M12, as shown in Figure 1. All noise injected by

the current driver enters the generator as a signal

type and is limited. The noise analysis of the circuit

is shown in Figure 2.

Since the current-driven bulk transistors M1

and M2 are encoded in stages, we do not expect any

interference with current technology, [5]. However,

when the large type transformer is replaced, the

body-drain voltage of the input pair will change,

which will lead to switching, [26]. We reduce this

variation by adding coupling capacitor C1 between

the body and the gap between the input pairs.

Schematic (Sedit) and layout (Ledit) views of the

designed circuit were simulated using tanner as

shown in Figure 2 and Figure 3. Low noise and

distortion indicate that the op amplifier is accurate

because the two main sources of error, Noise and

distortion, are tightly controlled. The performance

comparison of the generator we designed and the

performance design is shown in Table 1.

The frequency response of the folded cascode

op amp is related to the load capacitance CL. The

amplitude and phase diagram is shown in Figure 4

and Figure 5 with 54db gain. The DC analysis of

the circuit is shown in Figure 7. The integration

further increases the bandwidth in our design.

Reduce equipment size and reduce energy

consumption. This should be attributed to the

reverse substrate tendency of the driver body,

which uses current technology to reduce noise and

use more energy. But higher power consumption

can help improve the matching value, current gap

and balancing voltage.

5 Simulation Results

The operational amplifier with current driving bulk

technology for input differential pair has been

simulate during tanner tools. The schematic (Sedit)

and layout (Ledit) view of a designed circuit is

simulated using tanner which is shown in

Figure 2 and Figure 3.

Fig. 2: Schematic diagram of LNA

Fig. 3: Layout Diagram of LNA

Low noise and distortion demonstrate that the

op-amp is accurate because the two major error

sources of noise and distortion have been strictly

limited.

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Fig. 4: AC analysis (magnitude plot)

Fig. 5: AC analysis (phase plot)

Fig. 6: DC analysis

Figure 4 and Figure 5 discuss the magnitude

plot and phase plot of LNA. Figure 6 shows the DC

analysis of low noise amplifier.

Table 1. Simulation results of different parameters

Table 1 discusses about the parameter

specifications such as UGB ,CMRR simulation

results obtained for low noise amplifier.

6 Conclusion

This paper uses body-based MOS devices in the

saturation region to create a device with low power

consumption, low input voltage, high open-loop

gain, and less noise. Most drivers have low noise

and can improve the low noise of operational

amplifiers. The operational amplifier concept is

loop gain and less than 3mv power consumption,

and is fully integrated with TSMC 0.25μm

technology.

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Parameter

Specifications

Obtained results

AVD

54db

54.3dB

UGB

108MHz

108.4MHz

AIC

–53.8dB

CMRR

108.1dB

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Contribution of Individual Authors to the

Creation of a Scientific Article (Ghostwriting

Policy)

- Dr.Vasudeva G carried out the simulation of the

Low Noise amplifier with schematic and layout.

- Dr.Bharathi Gururaj is responsible for the

tabulation of results.

Sources of Funding for Research Presented in a

Scientific Article or Scientific Article Itself

No funding was received for conducting this study.

Conflict of Interest

The authors have no conflicts of interest to declare.

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(Attribution 4.0 International, CC BY 4.0)

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Creative Commons Attribution License 4.0

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