abeb661b-4589-4c4e-bb46-fb4c14cc1bb720210324065848127wseamdt@crossref.orgMDT DepositWSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS2224-266X1109-273410.37394/23201http://wseas.org/wseas/cms.action?id=2861220202022020201910.37394/23201.2020.19http://wseas.org/wseas/cms.action?id=23183HatimAmezianePhysics Department- Ced-st, Lessi, Faculty of Sciences Sidi Mohamed Ben Abdellah University Bp 1796, 30003 Fez MoroccoKamalZaredPhysics Department- Ced-st, Lessi, Faculty of Sciences Sidi Mohamed Ben Abdellah University Bp 1796, 30003 Fez MoroccoHassanQjidaaPhysics Department- Ced-st, Lessi, Faculty of Sciences Sidi Mohamed Ben Abdellah University Bp 1796, 30003 Fez MoroccoThis paper sets out a new technique for designing an operational amplifier (OP-AMP) using tanner EDA 1um FDSOI CMOS Technology. Fully Depleted Silicon on Insulator used for building integrated circuits to support the temperature changes, the proposed OP-AMP operates at 3.75V power supply and 70uA bias current using the proposed Adaptive Biasing Circuitry (ABC), which its devices operate at the weak inversion to allow low power dissipation of 0.62mW. The 0.064us settling time and 37.016V/μs slew rate parameters improved by the ABC technique, reducing the power dissipation by operating the ABC devices in weak inversion. The phase margin is more than 100 degrees for the DC gain of 13.97dB, which is a reasonable margin when temperature range increases.142021142021250256https://www.wseas.org/multimedia/journals/circuits/2020/a545101-743.pdf10.37394/23201.2020.19.27https://www.wseas.org/multimedia/journals/circuits/2020/a545101-743.pdfJ Karki - Mixed Signal and Analog Operational Amplifiers -April 1998 Digital Signal Processing Solutions " Understanding Operational Amplifier Specifications" 10.1109/tcsii.2018.2817261Hitesh Modi, Nilesh D. Patel, "Design and Simulation of two Stage OTA using 0.l8 pm and 0.35 p A.D. Grasso, G. Palumbo Fellow, Pennisi Fellow, "Dual push-pull high-speed rail-to-rail CMOS buffer amplifier for flatpanel displays" IEEE Transactions on Circuits and Systems II: Express Briefs, 2018 OP-AMPAND ITSAPPLICATIONS https://kobita1234.files.wordpress.com/2016/11 /ch-68.pdf Phillip E. Allen and Douglas R. Holberg, CMOS Analog Circuit Design, Saunders College Publishing HBJ, 2002. 10.11591/ijece.v9i6.pp4637-4648H. Ameziane,H.Akhamal, K. Zared, H. Qjidaa “Full On-chip low dropout voltage regulator with an enhanced transient response for low power systems” International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 6: December 2019 . Using op amps with data converters https://www.analog.com/media/en/trainingseminars/design-handbooks/Op-AmpApplications/Section3.pdf 10.1109/aicera-icmicr.2013.6576034Himadri Singh Raghav, B.P. Singh, Sachin Maheshwari, "Design of Low Voltage OTA for Bio-medical Application", IEEE International Conference on Microelectronics, Communication and Renewable Energy, pp. 2013. 10.1109/4.487994Eggermont, J.-P.; De Ceuster, D.; Flandre, D.; Gentinne, B.; Jespers, P.G.A.; Colinge, J.-P. Design of SOI CMOS operational amplifiers for applications up to 300 °C. IEEE J. SolidState Circuits 1996, 31 (2), 179–186. 10.1109/4.535416Silveira, F.; Flandre, D.; Jespers, P.G.A. A gm/Id based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA. IEEE J. Solid-State Circuits 1996, 31 (9), 1314–1319. B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill Book Company, 2001 10.1109/tcsii.2018.2817261A.D. Grasso, G. Palumbo Fellow, Pennisi Fellow, "Dual push-pull high-speed rail-to-rail CMOS buffer amplifier for flat-panel displays" IEEE Transactions on Circuits and Systems II: Express Briefs, 2018 10.1109/jssc.2015.2477944K. H. Mak, M. W. Lau, J. Guo, T. W. Mui, W. L. Goh and L. N. Leung, “A 0.7V 24μA Hybrid OTA Driving 15nF Capacitive Load with 1.46MHz GBW,” IEEE J. Solid State Circuits, vol.50, no.11, pp. 2750-2757, Nov. 2015.